Commit Graph

119274 Commits

Author SHA1 Message Date
Reid Kleckner
1249487852 [WinEH] Add some test cases I forgot to add to previous commits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 21:13:53 +00:00
Reid Kleckner
e23370402c [WinEH] Insert the EH code load before the block terminator
The previous code put the load after the terminator, leading to invalid
IR and downstream crashes. This caused http://crbug.com/506446.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 21:13:43 +00:00
Simon Pilgrim
3ecdd44e5d [X86][SSE4A] Shuffle lowering using SSE4A EXTRQ/INSERTQ instructions
This patch adds support for v8i16 and v16i8 shuffle lowering using the immediate versions of the SSE4A EXTRQ and INSERTQ instructions. Although rather limited (they can only act on the lower 64-bits of the source vectors, leave the upper 64-bits of the result vector undefined and don't have VEX encoded variants), the instructions are still useful for the zero extension of any lane (EXTRQ) or inserting a lane into another vector (INSERTQ). Testing demonstrated that it wasn't typically worth it to use these instructions for v2i64 or v4i32 vector shuffles although they are capable of it.

As well as adding specific pattern matching for the shuffles, the patch uses EXTRQ for zero extension cases where SSE41 isn't available and its more efficient than the SSE2 'unpack' default approach. It also adds shuffle decode support for the EXTRQ / INSERTQ cases when the instructions are handling full byte-sized extractions / insertions.

From this foundation, future patches will be able to make use of the instructions for situations that use their ability to extract/insert at the bit level.

Differential Revision: http://reviews.llvm.org/D10146

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:46:41 +00:00
Simon Pilgrim
ecb00f403c [X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.

This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.

Differential Revision: http://reviews.llvm.org/D10947

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:30:47 +00:00
Quentin Colombet
4bde0fa367 [TwoAddressInstructionPass] Rename a variable to match the coding style.
Spot by Bruno.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:12:54 +00:00
Rafael Espindola
9c3967db0f Swap operands instead of using !.
This avoids returning true for A == B.

Thanks to Benjamin Kramer for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241490 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 19:24:40 +00:00
Rafael Espindola
40b3496f9a When sorting by address, undefined symbols go first.
This matches gnu nm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241488 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 19:21:04 +00:00
Rafael Espindola
be2ff7bc98 Reduce code duplication. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241484 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 18:48:47 +00:00
Reid Kleckner
f0101b2d60 [llvm-extract] Drop comdats from declarations
The verifier rejects comdats on declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 18:48:02 +00:00
Rafael Espindola
e473de21aa Fix printing of common symbols.
Printing the symbol size matches the behavior or both gnu nm and freebsd nm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 18:18:44 +00:00
Alex Lorenz
edfa571cbd llc: Add a 'run-pass' option.
This commit adds a 'run-pass' option to llc, which instructs the compiler to run
one specific code generation pass only.

Llc already has the 'start-after' and the 'stop-after' options, and this new
option complements the other two by making it easier to write tests that want
to invoke a single pass only.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10776


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241476 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 17:44:26 +00:00
Matt Arsenault
b560f9ca2f AMDGPU: Run SIInsertWaits as pre-emit pass
Running this after the scheduler enables scheduling
waits later so other ALU instructions can run while
this would be waiting.

When combined with enabling the post-RA scheduler, this
gives about a ~20% improvement on sgemm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241473 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 17:02:20 +00:00
Daniel Sanders
96fe9196e9 Change the last few internal StringRef triples into Triple objects.
Summary:
This concludes the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

At this point, the StringRef-form of GNU Triples should only be used in the
public API (including IR serialization) and a couple objects that directly
interact with the API (most notably the Module class). The next step is to
replace these Triple objects with the TargetTuple object that will represent
our authoratative/unambiguous internal equivalent to GNU Triples.

Reviewers: rengolin

Subscribers: llvm-commits, jholewinski, ted, rengolin

Differential Revision: http://reviews.llvm.org/D10962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:56:07 +00:00
Adrian Prantl
9d4ce7c110 DIBuilder: Don't rauw null pointers with empty arrays in finalize().
This makes the IR a little easier to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241470 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:36:02 +00:00
Daniel Sanders
24a1fec2a7 Where Triple has a suitable predicate, use it rather than the enum values. NFC.
Reviewers: mcrosier

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10960

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241469 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:33:18 +00:00
Sanjay Patel
a71390ff3b use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:27:35 +00:00
Teresa Johnson
3d41fcb3da Resubmit "Add new EliminateAvailableExternally module pass" (r239480)
This change includes a fix for https://code.google.com/p/chromium/issues/detail?id=499508#c3,
which required updating the visibility for symbols with eliminated definitions.

--Original Commit Message--

Add new EliminateAvailableExternally module pass, which is performed in
O2 compiles just before GlobalDCE, unless we are preparing for LTO.

This pass eliminates available externally globals (turning them into
declarations), regardless of whether they are dead/unreferenced, since
we are guaranteed to have a copy available elsewhere at link time.
This enables additional opportunities for GlobalDCE.

If we are preparing for LTO (e.g. a -flto -c compile), the pass is not
included as we want to preserve available externally functions for possible
link time inlining. The FE indicates whether we are doing an -flto compile
via the new PrepareForLTO flag on the PassManagerBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241466 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:22:42 +00:00
Adrian Prantl
e91246ae8c Use an early exit in DIBuilder::finalize() to improve readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:22:12 +00:00
Adrian Prantl
a566afc69a Use the correct DIArray types in DICompileUnit::replace*().
Thanks to Yaron Keren for noticing!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241464 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:22:07 +00:00
Sanjay Patel
98d447c206 use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241463 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:19:14 +00:00
Matt Arsenault
6fe7acaaf8 AMDGPU/SI: Add debugging subtarget feature for DS offsets
We don't have a good way to detect most situations where
DS offsets are usable on SI, so add an option to force using
them even if unsafe for debugging performance problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241462 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:01:58 +00:00
James Y Knight
067b86fcab [Sparc] Add more instruction aliases.
These are mostly from the chart in the SparcV8 spec, section "A.3
Synthetic Instructions".

Differential Revision: http://reviews.llvm.org/D9834

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241461 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:01:07 +00:00
James Y Knight
d32974f9dc [Sparc] Add support for flush instruction.
Differential Revision: http://reviews.llvm.org/D9833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:01:04 +00:00
Rafael Espindola
297f505009 Simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241458 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 15:53:43 +00:00
Rafael Espindola
a46a5bf8ab Simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241456 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 15:47:43 +00:00
Rafael Espindola
078442e9d4 Inline function into single use. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241453 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 15:36:50 +00:00
Rafael Espindola
c2966a3ac7 Remove getRelocationAddress.
Originally added in r139314.

Back then it didn't actually get the address, it got whatever value the
relocation used: address or offset.

The values in different object formats are:

* MachO: Always an offset.
* COFF: Always an address, but when talking about the virtual address of
  sections it says: "for simplicity, compilers should set this to zero".
* ELF: An offset for .o files and and address for .so files. In the case of the
  .so, the relocation in not linked to any section (sh_info is 0). We can't
  really compute an offset.

Some API mappings would be:

* Use getAddress for everything. It would be quite cumbersome. To compute the
  address elf has to follow sh_info, which can be corrupted and therefore the
  method has to return an ErrorOr. The address of the section is also the same
  for every relocation in a section, so we shouldn't have to check the error
  and fetch the value for every relocation.

* Use a getValue and make it up to the user to know what it is getting.

* Use a getOffset and:
 * Assert for dynamic ELF objects. That is a very peculiar case and it is
   probably fair to ask any tool that wants to support it to use ELF.h. The
   only tool we have that reads those (llvm-readobj) already does that. The
   only other use case I can think of is a dynamic linker.
 * Check that COFF .obj files have sections with zero virtual address spaces. If
   it turns out that some assembler/compiler produces these, we can change
   COFFObjectFile::getRelocationOffset to subtract it. Given COFF format,
   this can be done without the need for ErrorOr.

The getRelocationAddress method was never implemented for COFF. It also
had exactly one use in a very peculiar case: a shortcut for adding the
section value to a pcrel reloc on MachO.

Given that, I don't expect that there is any use out there of the C API. If
that is not the case, let me know and I will add it back with the implementation
inlined and do a proper deprecation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241450 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:55:37 +00:00
Chad Rosier
ac244651b2 Fix a bug in the A57FPLoadBalancing register tracking/scavenger.
The code in AArch64A57FPLoadBalancing::scavengeRegister() to handle dead defs
was not correctly handling aliased registers.  E.g. if the dead def was of D2,
then S2 was not being marked as unavailable, so it could potentially be used
across a live-range in which it would be clobbered.

Patch by Geoff Berry <gberry@codeaurora.org>!
Phabricator: http://reviews.llvm.org/D10900


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241449 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:46:34 +00:00
Rafael Espindola
159946938f Check that COFF .obj files have sections with zero virtual address spaces.
When talking about the virtual address of sections the coff spec says:
  ... for simplicity, compilers should set this to zero. Otherwise, it is an
  arbitrary value that is subtracted from offsets during relocation.

We don't currently subtract it, so check that it is zero.

If some producer does create such files, we can change getRelocationOffset
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241447 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:26:07 +00:00
Simon Pilgrim
ff55c29f54 [X86][SSE] Added missing stack folding test for SQRTSD and SQRTSS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241445 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:15:02 +00:00
Asaf Badouh
169ee3383c [X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
pmulhrsw

review:
http://reviews.llvm.org/D10948

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:03:40 +00:00
Petar Jovanovic
d095a756cc [Mips] Add support for MCJIT for MIPS32r6
Add support for resolving MIPS32r6 relocations in MCJIT.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10687


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241442 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 12:50:55 +00:00
Rafael Espindola
a25ee390b5 Fix handling of ELF::R_MIPS_32 on Mips64.
Thanks to Aboud, Amjad for reporting the regression and providing the testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241440 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 12:18:44 +00:00
Craig Topper
fade2f72b8 [TableGen] Change a couple methods to return an ArrayRef instead of a const std::vector reference. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241430 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 06:23:01 +00:00
Rafael Espindola
757b251a80 Make this test a bit more interesting.
Before every test was using a section with an address of zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 02:45:01 +00:00
NAKAMURA Takumi
80f927c1c1 Untabify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241423 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 00:48:17 +00:00
Sanjay Patel
ff7b255377 change CHECK to CHECK-LABEL for more precision
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241422 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 23:19:16 +00:00
Sanjay Patel
a92598d339 remove unnecessary test specifications
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241419 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 22:37:51 +00:00
Sanjay Patel
050a899a23 minimize test case and remove unnecessary opt passes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241418 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 22:30:12 +00:00
Sanjay Patel
2a1f755c06 remove unnecessary temp variable; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 21:21:47 +00:00
Peter Collingbourne
cf47c180e1 Verifier: Forbid comdats on linker declarations.
Differential Revision: http://reviews.llvm.org/D10945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 20:52:40 +00:00
Peter Collingbourne
ce2b45bd7d IR: Do not consider available_externally linkage to be linker-weak.
From the linker's perspective, an available_externally global is equivalent
to an external declaration (per isDeclarationForLinker()), so it is incorrect
to consider it to be a weak definition.

Also clean up some logic in the dead argument elimination pass and clarify
its comments to better explain how its behavior depends on linkage,
introduce GlobalValue::isStrongDefinitionForLinker() and start using
it throughout the optimizers and backend.

Differential Revision: http://reviews.llvm.org/D10941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 20:52:35 +00:00
Sanjay Patel
3b19ca3a2e use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241412 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 20:15:21 +00:00
Benjamin Kramer
54b3b4c15e [TargetLowering] StringRefize asm constraint getters.
There is some functional change here because it changes target code from
atoi(3) to StringRef::getAsInteger which has error checking. For valid
constraints there should be no difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 19:29:18 +00:00
Simon Pilgrim
995b551ae7 [X86][SSE3] Just use an explicit SSE3 target attribute - not a cpu type.
Merged arch/target into a specific triple - we had i686 and x86_64 targets overriding each other....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241410 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 19:06:32 +00:00
Simon Pilgrim
5fd4fe08f6 [X86][SSE2] Just use an explicit SSE2 target attribute - not a cpu type.
corei7 is capable of a lot more than just SSE2.... 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241409 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 19:03:51 +00:00
Lang Hames
91383a36da [RuntimeDyld] Add comment documenting the behavior change in r241383.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241408 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 18:49:17 +00:00
Asaf Badouh
5047893c31 [x86][AVX512] add Multiply High Op
include encoding and intrinsics tests.

review
http://reviews.llvm.org/D10896

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241406 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 12:23:20 +00:00
Michael Kuperstein
bb803fd76e [X86] Fix incorrect/inefficient pushw encodings for x86-64 targets
Correctly support assembling "pushw $imm8" on x86-64 targets. 
Also some cleanup of the PUSH instructions (PUSH64i16 and PUSHi16 actually
represent the same instruction)

This fixes PR23996

Patch by: david.l.kreitzer@intel.com
Differential Revision: http://reviews.llvm.org/D10878

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241404 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 10:25:41 +00:00
NAKAMURA Takumi
a2a3583415 [CMake] add_llvm_symbol_exports: Use Python oneliner instead of "cmd.exe /c type" to generate *.def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241402 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 08:56:38 +00:00