Jakob Stoklund Olesen
ef6c76c984
Hook into PassManager's analysis verification.
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By overriding Pass::verifyAnalysis(), the pass contents will be verified
by the pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160994 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 20:57:50 +00:00
Pete Cooper
32ecfb4158
Consider address spaces for hashing and CSEing DAG nodes. Otherwise two loads from different x86 segments but the same address would get CSEd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160987 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 20:23:19 +00:00
Eric Christopher
b7e22efa2b
Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160981 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 20:09:37 +00:00
Kevin Enderby
5af4de18ef
Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cpp
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where the other_half of the movt and movw relocation entries needs to get set
and only with the 16 bits of the other half.
rdar://10038370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 18:46:15 +00:00
Jakob Stoklund Olesen
3f63a58978
Add MachineInstr::isTransient().
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This is a cleaned up version of the isFree() function in
MachineTraceMetrics.cpp.
Transient instructions are very unlikely to produce any code in the
final output. Either because they get eliminated by RegisterCoalescing,
or because they are pseudo-instructions like labels and debug values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160977 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 18:34:14 +00:00
Jakob Stoklund Olesen
a1b2bf7979
Add MachineTraceMetrics::verify().
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This function verifies the consistency of cached data in the
MachineTraceMetrics analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 18:34:11 +00:00
Jakob Stoklund Olesen
ee31ae12e8
Verify that the CFG hasn't changed during invalidate().
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The MachineTraceMetrics analysis must be invalidated before modifying
the CFG. This will catch some of the violations of that rule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 17:36:49 +00:00
Jakob Stoklund Olesen
f192b507a3
Add MachineBasicBlock::isPredecessor().
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A->isPredecessor(B) is the same as B->isSuccessor(A), but it can
tolerate a B that is null or dangling. This shouldn't happen normally,
but it it useful for verification code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 17:36:47 +00:00
Nadav Rotem
97baaeaeb2
When constant folding GEP expressions, keep the address space information of pointers.
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Together with Ran Chachick <ran.chachick@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 07:25:20 +00:00
Craig Topper
818f609459
Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoad
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 07:14:07 +00:00
Craig Topper
49d86c9eb9
Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 06:48:11 +00:00
Craig Topper
95c929f45c
Remove some unnecessary filter checks. They were already covered by IsCodeGenOnly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160950 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 06:27:19 +00:00
Craig Topper
24fd0ddf31
Remove check for sub class of X86Inst from filter function since caller guaranteed it. Replace another sub class check with ShouldBeEmitted flag since it was factored in there already.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 05:39:34 +00:00
Craig Topper
50c5c8275e
Simplify code that filtered certain instructions in two different ways. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 05:10:05 +00:00
Craig Topper
87a9ece154
Remove check for f256mem from has256BitOperands as nothing depended on it and it isn't the only 256-bit memory type anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 04:53:00 +00:00
Craig Topper
e6c97ffb0d
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 04:48:12 +00:00
Craig Topper
706698e0b7
Give VCVTTPD2DQ priority over CVTTPD2DQ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 02:20:32 +00:00
Craig Topper
80e13a5506
Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160941 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 02:14:02 +00:00
Craig Topper
3ff91c3ac6
Fix up patterns for VCVTSS2SD. Specifically give it priority over SSE form. Add an OptForSpeed to explicitly pair up with an OptForSize that was already on another pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160939 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30 01:38:57 +00:00
Craig Topper
19006bdee1
Fix load types on intrinsic forms of SS2SD and SD2SS AVX/SSE convert instruction patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160938 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 23:26:34 +00:00
Craig Topper
26a79b7b94
Move more SSE/AVX convert instruction patterns into their definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 22:30:06 +00:00
Benjamin Kramer
a77b95a316
APInt: Simplify code.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160929 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 12:33:29 +00:00
Manman Ren
e8b4a4a9d1
Revert r160920 and r160919 due to dragonegg and clang selfhost failure
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160927 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 02:44:09 +00:00
Nick Lewycky
d64cb165d7
Add testcases for GlobalOpt changes in r160693 and r160757.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-29 01:15:37 +00:00
Craig Topper
7fe1b96ef0
Fold patterns for some of the SSE/AVX convert instructions into their instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160922 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 18:59:19 +00:00
Craig Topper
eb6d794834
Mark some of the SSE/AVX convert instructions as mayLoad/neverHasSideEffects.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 18:36:39 +00:00
Manman Ren
14148c41d9
X86 Peephole: fold loads to the source register operand if possible.
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Trying to fix the bot by specifying a triple in the failing testing cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160920 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 17:51:24 +00:00
Manman Ren
0eb3edea9c
X86 Peephole: fold loads to the source register operand if possible.
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Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.
rdar://10554090 and rdar://11873276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160919 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 16:48:01 +00:00
Craig Topper
cdfbcdeeed
Make CVTSS2SI instruction definition consistent with CVTSD2SI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160914 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 08:28:23 +00:00
Craig Topper
e96d11c833
Fix up memory load types for SSE scalar convert intrinsic patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160913 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 07:59:59 +00:00
Manman Ren
43d9ab1812
X86 Peephole: fix PR13475 in optimizeCompare.
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It is possible that an instruction can use and update EFLAGS.
When checking the safety, we should check the usage of EFLAGS first before
declaring it is safe to optimize due to the update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160912 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 03:15:46 +00:00
Andrew Trick
4b72ada1f4
Reenable a basic SSA DAG builder optimization.
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Jakob fixed ProcessImplicifDefs in r159149.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-28 01:48:15 +00:00
Jakob Stoklund Olesen
08f6ef6a78
Add more debug output to MachineTraceMetrics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160905 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 23:58:38 +00:00
Jakob Stoklund Olesen
0271a5fa29
Keep track of the head and tail of the trace through each block.
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This makes it possible to quickly detect blocks that are outside the
trace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 23:58:36 +00:00
Eric Christopher
c23b933d5f
Add a DW_AT_high_pc for CUs that are a single address range. Update
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all tests accordingly.
Fixes PR13351.
Patch by shinichiro hamaji!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 22:00:05 +00:00
Jakob Stoklund Olesen
c16bf79303
Also compute register mask lists under -new-live-intervals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160898 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 21:56:39 +00:00
Chad Rosier
21edb397b2
Typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 21:41:59 +00:00
Evan Cheng
9c777a4844
Teach CodeGenPrep to look past bitcast when it's duplicating return instruction
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into predecessor blocks to enable tail call optimization.
rdar://11958338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 21:21:26 +00:00
Jakob Stoklund Olesen
b18d779b35
Eliminate the IS_PHI_DEF flag and VNInfo::setIsPHIDef().
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A value number is a PHI def if and only if it begins at a block
boundary. This can be derived from the def slot, a separate flag is not
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160893 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 21:11:14 +00:00
Jakob Stoklund Olesen
3dfa38a5bf
Add a -new-live-intervals experimental option.
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This option replaces the existing live interval computation with one
based on LiveRangeCalc.cpp. The new algorithm does not depend on
LiveVariables, and it can be run at any time, before or after leaving
SSA form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160892 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 20:58:46 +00:00
Andrew Kaylor
d83a547d67
Fixing problems with X86_64_32 relocations and making the assertions more readable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160889 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 20:30:12 +00:00
Jakob Stoklund Olesen
72e7dbf88b
Add <imp-def> of super-register when lowering SUBREG_TO_REG.
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Patch by Tyler Nowicki!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 20:19:49 +00:00
Benjamin Kramer
e82fafe9e2
SmallVector: Crank up verbosity of asserts per Chandler's request.
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Also add assertions to validate the iterator in the insert method overloads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 19:05:58 +00:00
Chad Rosier
85aa390713
The TimePassesIsEnabled has since moved to PassManager.cpp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 19:03:02 +00:00
Andrew Kaylor
e2e73bd044
Test commit, clean up comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 18:39:47 +00:00
Nuno Lopes
e982de7be9
fix PR13390: do not loop forever with self-referencing self instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 18:21:15 +00:00
Nuno Lopes
75564e3514
fix infinite loop in instcombine in the presence of a (malformed) self-referencing select inst.
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This can happen as long as the instruction is not reachable. Instcombine does generate these unreachable malformed selects when doing RAUW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160874 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 18:03:57 +00:00
Andrew Kaylor
2e319870f1
Test commit, clean up comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160873 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 17:52:42 +00:00
Jakob Stoklund Olesen
46c0dc7858
Give MCRegisterInfo an implementation file.
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Move some functions from MCRegisterInfo.h that don't need to be inline.
This shrinks llc by 8K.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160865 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 16:25:20 +00:00
Benjamin Kramer
df7c5d4137
SmallVector::erase: Assert that iterators are actually inside the vector.
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The rationale here is that it's hard to write loops containing vector erases and
it only shows up if the vector contains non-trivial objects leading to crashes
when forming them out of garbage memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-27 09:10:25 +00:00