Brian Gaeke
c2505985ce
brg
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InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
from visitReturnInst() to new method, promote32().
Use it in both visitReturnInst() and visitCallInst().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4839 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-30 11:57:28 +00:00
Brian Gaeke
18a20212d9
brg
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InstSelectSimple.cpp: First draft of visitCallInst method, handling
int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
PUSH with 32-bit reg arg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4838 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-29 12:01:58 +00:00
Brian Gaeke
c11232a8c4
brg
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InstSelectSimple.cpp: Add some comments that say what I'm going to do for
calls and casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4832 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-26 10:43:30 +00:00
Misha Brukman
8b938664f2
Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
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instructions correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 23:15:27 +00:00
Misha Brukman
f88a2853c8
Enable the register allocator pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:45:07 +00:00
Misha Brukman
cf2b9ac204
Added methods to read/write values to stack in .h, fixed implementation in
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.cpp to return the iterator correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:43:47 +00:00
Misha Brukman
a85d6bc2bc
Added -*- C++ -*- mode to the comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:42:50 +00:00
Misha Brukman
faf0b8c401
Add a simple way to add memory locations of format [reg+offset]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4825 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:42:12 +00:00
Brian Gaeke
fa8d571bd4
lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4821 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 11:07:01 +00:00
Chris Lattner
1d53ce4067
Handle cmp Reg, 0 correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4819 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 23:30:00 +00:00
Chris Lattner
7ef33a9076
Printing support for more stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4818 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:49:46 +00:00
Chris Lattner
3a9a693987
Don't add implicit operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4817 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:49:20 +00:00
Chris Lattner
128a7a96f0
Fix off by one bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4816 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:15 +00:00
Chris Lattner
15207f45db
Add fixme
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4815 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:01 +00:00
Chris Lattner
47b4a9b2e0
Minor code cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:04:50 +00:00
Chris Lattner
1804233ca5
Implement printing of store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4813 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:03:39 +00:00
Chris Lattner
3d3067bf6b
The big change here is to handle printing/emission of X86II::MRMSrcMem
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instructions. Right now the only users are load instructions, and Misha's
spill code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 20:44:15 +00:00
Chris Lattner
92845e37f5
Remove implicit information from instruction selector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4811 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 18:54:29 +00:00
Chris Lattner
457adb55f9
Add printing information for MUL and DIV
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4810 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 18:54:14 +00:00
Chris Lattner
94e8ee2282
Fix a bug that prevented compilation of multiple functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4809 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:26:58 +00:00
Chris Lattner
d3e0faca06
Remove opcode information for instructions that are completely defined now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4805 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:12:55 +00:00
Chris Lattner
644e3261d1
Add printing support for sahf & setcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4804 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:10:57 +00:00
Chris Lattner
675dd2cc47
Add printing support for /0 /1 type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:09:01 +00:00
Chris Lattner
85b39f229f
Add support for /0 /1, etc type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4802 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:08:49 +00:00
Chris Lattner
4b4e9dd937
Rename the SetCC X86 instructions to reflect the fact that they are the
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register versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4800 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 16:19:42 +00:00
Chris Lattner
05093a51b4
Simplify setcc code a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4799 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 15:52:38 +00:00
Chris Lattner
77875d88d0
Support Registers of the form (B8+ rd) for example
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 02:00:20 +00:00
Chris Lattner
97ad9e1fea
Dont' set flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4797 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:59:50 +00:00
Chris Lattner
233ad71051
Implement printing more, implement opcode output more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:44 +00:00
Chris Lattner
0dc20dda5b
Huge diff do to reindeinting comments.
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Basically just adds OpSize flags for instructions that need them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4795 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:28 +00:00
Chris Lattner
11e53e3c38
Add new prefix flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4794 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:32:55 +00:00
Chris Lattner
644e1abae4
Print another class of instructions correctly, giving us: xorl EDX, EDX
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for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:30:01 +00:00
Misha Brukman
7c58925050
Booleans are types too. And they get stored in bytes. And InstructionSelection
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doesn't assert fail. And everyone's happy. Yay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4792 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:25:56 +00:00
Misha Brukman
b83b28697c
Add definitions for function headers from MRegisterInfo.h:
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Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:59:43 +00:00
Misha Brukman
e1f0d8113a
Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
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printing out assembly. After all, we want the real thing too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:56:41 +00:00
Misha Brukman
d2cc017f46
Add mapping in MachineFunction from SSA regs to Register Classes. Also,
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uncovered a bug where registers were not being put in a map if they were not
found...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:58:23 +00:00
Misha Brukman
90ed18c201
Sigh. Fixed some speling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4775 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:56:42 +00:00
Misha Brukman
602b9ff595
Thanks to the R8, R16, and R32 macros, I can now deal with registers that
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belong to different register classes easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4773 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:47:40 +00:00
Brian Gaeke
c03a0cb01b
Brian Gaeke says:
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lib/Target/X86/InstSelectSimple.cpp: Add a little something to
visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-19 09:08:47 +00:00
Chris Lattner
f9f6088e17
Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:51 +00:00
Chris Lattner
f21dfcddcf
Expose base opcode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:24 +00:00
Chris Lattner
6aab9cf65c
Start to add more information to instr.def
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 05:37:11 +00:00
Chris Lattner
239dcfd215
Add instruction annotation about whether it has a 0x0F opcode prefix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4740 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:59:28 +00:00
Chris Lattner
9213b73c19
Add more void flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4739 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:37:48 +00:00
Chris Lattner
92bd0f9c4d
Set the void flag on instructions that should get it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4738 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:34:36 +00:00
Chris Lattner
927dd095c4
Arrange to have a TargetMachine available in X86InstrInfo::print
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:20:37 +00:00
Chris Lattner
e9b309ad13
Wow, I'm incapable of the simplest things today...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4732 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:05:21 +00:00
Chris Lattner
fb02a8b11f
Rename registers to follow the intel style of all caps
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4731 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:03:46 +00:00
Chris Lattner
dbb61c6445
Reorganize printing interface a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:53:13 +00:00
Chris Lattner
71e83caecd
Fix minor detail
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4725 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:33:26 +00:00