Commit Graph

11807 Commits

Author SHA1 Message Date
Rafael Espindola
9758b4ae95 Simplify the Mangler interface now that DataLayout is mandatory.
We only need to pass in a DataLayout when mangling a raw string, not when
constructing the mangler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240405 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 13:59:29 +00:00
Rafael Espindola
b9ed9af341 Use MCSymbols for FastISel.
The summary is that it moves the mangling earlier and replaces a few
calls to .addExternalSymbol with addSym.

I originally wanted to replace all the uses of addExternalSymbol with
addSym, but noticed it was a lot of work and doesn't need to be done
all at once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 12:21:54 +00:00
Alexander Kornienko
cd52a7a381 Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
Apparently, the style needs to be agreed upon first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 09:49:53 +00:00
Elena Demikhovsky
d96e362b3f AVX-512: Added all forms of VPABS instruction
Added all intrinsics, tests for encoding, tests for intrinsics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 08:19:46 +00:00
Sanjay Patel
8bd59f505a [x86] generalize reassociation optimization in machine combiner to 2 instructions
Currently ( D10321, http://reviews.llvm.org/rL239486 ), we can use the machine combiner pass
to reassociate the following sequence to reduce the critical path:

A = ? op ?
B = A op X
C = B op Y
-->
A = ? op ?
B = X op Y
C = A op B

'op' is currently limited to x86 AVX scalar FP adds (with fast-math on), but in theory, it could
be any associative math/logic op (see TODO in code comment).

This patch generalizes the pattern match to ignore the instruction that defines 'A'. So instead of
a sequence of 3 adds, we now only need to find 2 dependent adds and decide if it's worth
reassociating them.

This generalization has a compile-time cost because we can now match more instruction sequences
and we rely more heavily on the machine combiner to discard sequences where reassociation doesn't
improve the critical path.

For example, in the new test case:

A = M div N
B = A add X
C = B add Y

We'll match 2 reassociation patterns, but this transform doesn't reduce the critical path:

A = M div N
B = A add Y
C = B add X

We need the combiner to reject that pattern but select this:

A = M div N
B = X add Y
C = B add A

Differential Revision: http://reviews.llvm.org/D10460



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 00:39:40 +00:00
Simon Pilgrim
7132523d6a [X86][FMA4] FMA4 ops can perform unaligned folded loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240342 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:49:41 +00:00
Ahmed Bougacha
a3afb70a5d [X86] Teach load folding to accept scalar _Int users of MOVSS/MOVSD.
The _Int instructions are special, in that they operate on the full
VR128 instead of FR32.  The load folding then looks at MOVSS, at the
user, and bails out when it sees a size mismatch.

What we really know is that the rm_Int instructions don't load the
higher lanes, so folding is fine.

This happens for the straightforward intrinsic code, e.g.:

    _mm_add_ss(a, _mm_load_ss(p));

Fixes PR23349.

Differential Revision: http://reviews.llvm.org/D10554


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240326 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:51:51 +00:00
Sanjay Patel
73aa02eb09 [x86] set default reciprocal (division and square root) codegen to match GCC
D8982 ( checked in at http://reviews.llvm.org/rL239001 ) added command-line 
options to allow reciprocal estimate instructions to be used in place of
divisions and square roots.

This patch changes the default settings for x86 targets to allow that recip
codegen (except for scalar division because that breaks too much code) when
using -ffast-math or its equivalent. 

This matches GCC behavior for this kind of codegen.

Differential Revision: http://reviews.llvm.org/D10396



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240310 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:29:44 +00:00
Rafael Espindola
09bbd16112 Avoid a Symbol -> Name -> Symbol conversion.
Before this we were producing a TargetExternalSymbol from a MCSymbol.
That meant extracting the symbol name and fetching the symbol again
down the pipeline.

This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the
DAG.

Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900,
allowing r240130 to be committed again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:46:53 +00:00
Elena Demikhovsky
114489ab24 AVX-512: added VPSHUFB instruction - all SKX forms
Added intrinsics and encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240277 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 13:00:42 +00:00
Elena Demikhovsky
4f1ddd396b AVX-512: All forms of VCOPMRESS VEXPAND instructions,
encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240272 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 11:16:30 +00:00
Elena Demikhovsky
42ceb12123 Reverted AVX-512 vector shuffle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 09:01:15 +00:00
Michael Kuperstein
12219f8c85 [X86] Allow more call sequences to use push instructions for argument passing
This allows more call sequences to use pushes instead of movs when optimizing for size.
In particular, calling conventions that pass some parameters in registers (e.g. thiscall) are now supported.

Differential Revision: http://reviews.llvm.org/D10500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240257 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 08:31:22 +00:00
Elena Demikhovsky
c768510422 AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and
VPERMI2W/D/Q/PS/PD instructions.
Added tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 06:45:48 +00:00
Simon Pilgrim
da5f3d8f76 [X86] Code tidyup - Use SDValue bool operator. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240249 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 21:34:32 +00:00
Simon Pilgrim
1eabc9fb9d [X86][SSE] Fix PerformSExtCombine bug that accessed the wrong return value of an aggregate type.
Fix to rL237885 to ensure that it accesses the correct return value of an aggregate type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 16:19:24 +00:00
Sanjay Patel
30c3b2a4c2 name change: hasPattern() -> getMachineCombinerPatterns() ; NFC
This was suggested as part of D10460, but it's independent of
any functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 23:21:42 +00:00
Rafael Espindola
7edd010739 Improve error handling of getRelocationAddend.
This patch changes getRelocationAddend to use ErrorOr and considers it an error
to try to get the addend of a REL section.

If, for example, a x86_64 file has a REL section, that file is corrupted and
we should reject it.

Using ErrorOr is not ideal since we check the section type once per relocation
instead of once per section.

Checking once per section would involve getRelocationAddend just asserting and
callers checking the section before iterating over the relocations.

In any case, this is an improvement and includes a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 20:58:43 +00:00
Alexander Kornienko
cf0db29df2 Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 15:57:42 +00:00
Eric Christopher
933d2bd391 Fix "the the" in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 01:53:21 +00:00
Sanjay Patel
b9b8054704 use SDValue bool operator; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240064 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 21:44:31 +00:00
Reid Kleckner
edb6ecd65a [X86] Rename RegInfo to TRI as suggested by Eric
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 20:32:02 +00:00
Reid Kleckner
f4e002cbd0 [X86] Refactor stack adjustments into X86FrameLowering::BuildStackAdjustment
Deduplicates some code and lets us use LEA on atom when adjusting the
stack around callee-cleanup calls. This is the only intended
functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 20:22:12 +00:00
Reid Kleckner
e7e3ecdbf2 [X86] Remove unneeded parameters and deduplicate stack alignment code
NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 18:03:25 +00:00
Asaf Badouh
27a2741354 quick fix for failure from r.240012
failure:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/11847/steps/build_Lld/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 12:57:24 +00:00
Asaf Badouh
bc5667c7ac [AVX512]
add instructions: VPAVGB and VPAVGW


review
http://reviews.llvm.org/D10504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 12:30:53 +00:00
Elena Demikhovsky
6c24289bef AVX-512: (fixed) Added encoding of all forms of VPERMT2W/D/Q/PS/PD and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 08:56:19 +00:00
Elena Demikhovsky
f3d6e24ca4 reverted 239999 due to test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240001 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 08:06:49 +00:00
Elena Demikhovsky
5686493ccc AVX-512: Added encoding of all forms of VPERMT2W/D/Q/PS/PD
and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239999 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 07:29:40 +00:00
Simon Pilgrim
6ebf741ea2 [X86][SSE] Improved support for vector i16 to float conversions.
Added explicit sign extension for v4i16/v8i16 to v4i32/v8i32 before conversion to floats. Matches existing support for v4i8/v8i8.

Follow up to D10433


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239966 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 22:43:34 +00:00
Reid Kleckner
4278cac3c4 Re-land "[X86] Cache variables that only depend on the subtarget"
Re-instates r239949 without accidentally flipping the sense of UseLEA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239950 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 21:50:02 +00:00
Reid Kleckner
cf4978e112 Revert "[X86] Cache variables that only depend on the subtarget"
This reverts commit r239948, tests seem to be failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239949 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 21:35:02 +00:00
Reid Kleckner
bbb75718b2 [X86] Cache variables that only depend on the subtarget
There is a one-to-one relationship between X86Subtarget and
X86FrameLowering, but every frame lowering method would previously pull
the subtarget off the MachineFunction and query some subtarget
properties.

Over time, these locals began to grow in complexity and it became
important to keep their names and meaning in sync across all of the
frame lowering methods, leading to duplication. We can eliminate that
duplication by computing them once in the constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239948 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 21:31:17 +00:00
David Majnemer
cc714e2142 Move the personality function from LandingPadInst to Function
The personality routine currently lives in the LandingPadInst.

This isn't desirable because:
- All LandingPadInsts in the same function must have the same
  personality routine.  This means that each LandingPadInst beyond the
  first has an operand which produces no additional information.

- There is ongoing work to introduce EH IR constructs other than
  LandingPadInst.  Moving the personality routine off of any one
  particular Instruction and onto the parent function seems a lot better
  than have N different places a personality function can sneak onto an
  exceptional function.

Differential Revision: http://reviews.llvm.org/D10429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:52:32 +00:00
Rafael Espindola
a1e31b45cc Move IsUsedInReloc from MCSymbolELF to MCSymbol.
There is a free bit is MCSymbol and MachO needs the same information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239933 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:08:20 +00:00
Igor Breger
a066970605 AVX-512: cvtusi2ss/d intrinsics.
Change builtin function name and signature ( add third parameter - rounding mode ).
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D10473

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 07:23:57 +00:00
Simon Pilgrim
e2d3e4467e [X86][SSE] Vectorize v2i32 to v2f64 conversions
This patch enables support for the conversion of v2i32 to v2f64 to use the CVTDQ2PD xmm instruction and stay on the SSE unit instead of scalarizing, sign extending to i64 and using CVTSI2SDQ scalar conversions.

Differential Revision: http://reviews.llvm.org/D10433

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 21:40:28 +00:00
Reid Kleckner
8e206c19f4 [X86] Rename some frame lowering variables
Old names, new names, and what they really mean:

- IsWin64 -> IsWin64CC: This is true on non-Windows x86_64 platforms
  when the ms_abi calling convention is used.
- IsWinEH -> IsWin64Prologue: True when the target is Win64, regardless
  of calling convention. Changes the prologue to obey the constraints of
  the Win64 unwinder.
- NeedsWinEH -> NeedsWinCFI: We're using the win64 prologue *and* the we
  want .xdata unwind tables. Analogous to NeedsDwarfCFI.

NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239836 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 18:08:57 +00:00
Daniel Sanders
ffb22b8d80 Clean up redundant copies of Triple objects. NFC
Summary:

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10382


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239823 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 15:44:21 +00:00
Asaf Badouh
7ae3494732 [AVX512] add integer min/max intrinsics support.
review:
http://reviews.llvm.org/D10439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 08:39:27 +00:00
Elena Demikhovsky
05e61f7113 X86: optimized i64 vector multiply with constant
When we multiply two 64-bit vectors, we extract lower and upper part and use the PMULUDQ instruction.
When one of the operands is a constant, the upper part may be zero, we know this at compile time.
Example: %a = mul <4 x i64> %b, <4 x i64> < i64 5, i64 5, i64 5, i64 5>.
I'm checking the value of the upper part and prevent redundant "multiply", "shift" and "add" operations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 06:07:24 +00:00
Reid Kleckner
46446a56b8 [X86] Try to shorten dwarf CFI emission
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:45:08 +00:00
Sanjoy Das
a1e554d253 [TargetInstrInfo] Add new hook: AnalyzeBranchPredicate.
Summary:
NFC: no one uses AnalyzeBranchPredicate yet.

Add TargetInstrInfo::AnalyzeBranchPredicate and implement for x86.  A
later change adding support for page-fault based implicit null checks
depends on this.

Reviewers: reames, ab, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239742 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:21 +00:00
Sanjoy Das
319c91bbb0 [TargetInstrInfo] Rename getLdStBaseRegImmOfs and implement for x86.
Summary:

TargetInstrInfo::getLdStBaseRegImmOfs to
TargetInstrInfo::getMemOpBaseRegImmOfs and implement for x86.  The
implementation only handles a few easy cases now and will be made more
sophisticated in the future.

This is NFCI: the only user of `getLdStBaseRegImmOfs` (now
`getmemOpBaseRegImmOfs`) is `LoadClusterMotion` and `LoadClusterMotion`
is disabled for x86.

Reviewers: reames, ab, MatzeB, atrick

Reviewed By: MatzeB, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239741 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:14 +00:00
Sanjoy Das
1991e2a4df [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.
Summary:
This instruction encodes a loading operation that may fault, and a label
to branch to if the load page-faults.  The locations of potentially
faulting loads and their "handler" destinations are recorded in a
FaultMap section, meant to be consumed by LLVM's clients.

Nothing generates FAULTING_LOAD_OP instructions yet, but they will be
used in a future change.

The documentation (FaultMaps.rst) needs improvement and I will update
this diff with a more expanded version shortly.

Depends on D10196

Reviewers: rnk, reames, AndyAyers, ab, atrick, pgavlin

Reviewed By: atrick, pgavlin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:08 +00:00
Sanjoy Das
36395e7598 [NFC] Extract X86MCInstLower::LowerMachineOperand.
Summary: Refactoring-only change that will be used later.

Reviewers: reames, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239739 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:01 +00:00
Igor Breger
17ae2138b0 AVX-512: Implemented DAG lowering for shuff62x2/shufi62x2 instuctions ( Shuffle Packed Values at 128-bit Granularity )
Tests added , vector-shuffle-512-v8.ll test re-generated.

Differential Revision: http://reviews.llvm.org/D10300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 13:07:47 +00:00
Michael Kuperstein
3dd555171e Add support for parsing the XOR operator in Intel syntax inline assembly.
Differential Revision: http://reviews.llvm.org/D10385
Patch by marina.yatsina@intel.com


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 12:59:45 +00:00
Igor Breger
6ea3ad7e6e AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.
Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D10430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 12:44:55 +00:00
Simon Pilgrim
9223c2cb1e Stripped trailing whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239672 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 12:51:39 +00:00