Commit Graph

5399 Commits

Author SHA1 Message Date
Duncan Sands
c3e26727c1 Softfloat support for FDIV. Patch by
Richard Pennington.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53773 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18 21:18:48 +00:00
Duncan Sands
f8ac645c59 Eliminate unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53772 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18 21:07:41 +00:00
Duncan Sands
77926da196 Revert 53729, after waking up in the middle of
the night realising that it was wrong :)  I
think the reason the same type was being used
for the shufflevec of indices as for the actual
indices is so that if one of them needs splitting
then so does the other.  After my patch it might
be that the indices need splitting but not the
rest, yet there is no good way of handling that.
I think the right solution is to not have the
shufflevec be an operand at all: just have it
be the list of numbers it actually is, stored
as extra info in the node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18 20:12:05 +00:00
Dan Gohman
fa82857e41 Fix a LocalSpiller leak. This fixes tramp3d-v4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53766 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18 18:28:56 +00:00
Dan Gohman
2c3f7ae384 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 23:49:46 +00:00
Dan Gohman
dc5f936bf8 When printing MemOperand nodes, only use print() for
PseudoSourceValue values, which never have names. Use getName()
for all other values, because we want to print just a short summary
of the value, not the entire instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53738 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 21:12:16 +00:00
Evan Cheng
76a4d58998 Subreg live interval valno may not have a corresponding def machineinstr since it's less precise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:48:53 +00:00
Duncan Sands
f1bb7f1d3e Use a legal type for elements of the vector_shuffle
mask.  These are just indices into the shuffled vector
so their type is unrelated to the type of the
shuffled elements (which is what was being used before).
This fixes vec_shuffle-11.ll when using LegalizeTypes.
What seems to have happened is that Dan's recent change
r53687, which corrected the result type of the shuffle,
somehow caused LegalizeTypes to notice that the mask
operand was a BUILD_VECTOR with a legal type but elements
of an illegal type (i64).  LegalizeTypes legalized this
by introducing a new BUILD_VECTOR of i32 and bitcasting
it to the old type.  But the mask operand is not supposed
to be a bitcast but a straight BUILD_VECTOR of constants,
causing a crash.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53729 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:28:41 +00:00
Dan Gohman
e8be6c6391 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.

Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.

This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.

These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:10:17 +00:00
Duncan Sands
79ada108dd LegalizeTypes support for what seems to be the
only missing ppc long double operations: FNEG
and FP_EXTEND.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53723 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 17:35:14 +00:00
Duncan Sands
f00e74f4d6 Turn LegalizeTypes back off again for the moment:
it is breaking Darwin bootstrap due to missing
functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53721 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 17:06:03 +00:00
Duncan Sands
b2ff885aae Factorize some code for determining which libcall to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53713 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 02:36:29 +00:00
Dan Gohman
7a9a5af6a0 Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. This
was turned up by some new SelectionDAG assertion checks that I'm
working on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 16:13:58 +00:00
Duncan Sands
95db39a9de Add support for promoting and expanding AssertZext
and AssertSext.  Needed when passing huge integer
parameters with the zeroext or signext attributes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53684 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 16:03:07 +00:00
Dan Gohman
c0d6012b31 Fix a comment to say nonnegative instead of positive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53681 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 15:57:10 +00:00
Dan Gohman
c5e1f98fdf Add an assert to check for empty flags for MachineMemOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53680 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 15:56:42 +00:00
Duncan Sands
05c397d52a Reorder methods alphabetically. No functionality change.
While this is not a wonderful organizing principle, it
does make it easy to find routines, and clear where to
insert new ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53672 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 11:41:33 +00:00
Duncan Sands
7f1d8aeef6 Turn on LegalizeTypes by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53671 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 11:36:51 +00:00
Dan Gohman
4093d83010 SelectionDAG::AssignNodeIds is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53636 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 18:29:32 +00:00
Dan Gohman
90a7b8fba6 Don't sort SDNodes by their addresses in SelectionDAG::dump. Instead,
just use the AllNodes order, which is at least relatively stable
across runs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 18:18:54 +00:00
Duncan Sands
295a7cddbd LegalizeTypes support for fabs on ppc long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 15:02:44 +00:00
Duncan Sands
c07e6e53f7 LegalizeTypes support for promotion of bswap.
In LegalizeDAG the value is zero-extended to
the new type before byte swapping.  It doesn't
matter how the extension is done since the new
bits are shifted off anyway after the swap, so
extend by any old rubbish bits.  This results
in the final assembler for the testcase being
one line shorter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 10:18:22 +00:00
Duncan Sands
8d56a6f4d8 LegalizeTypes support for promotion of SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 10:14:24 +00:00
Duncan Sands
bf304c2065 Reorder the integer promotion methods alphabetically.
No change in functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53602 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 10:12:34 +00:00
Mon P Wang
2920d2b7b6 Fixed potential bug if the source and target of a bit convert have different alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 05:28:34 +00:00
Dan Gohman
5e84368b26 Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53567 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 18:19:29 +00:00
Dan Gohman
91d49f5ba1 Improve debug output for MemOperandSDNode. PseudoSourceValue nodes
don't have value names, so use print instead of getName() to get a
useful string.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53563 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:51:24 +00:00
Dan Gohman
2b062994a6 Fix edito in the PseudoSourceValue name list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:45:47 +00:00
Duncan Sands
189a2b32f8 I don't think BUILD_PAIR can have a vector result.
Remove support for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53559 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:34:19 +00:00
Duncan Sands
a489be59ef Tighten up some checks. Fix FPOWI splitting for
non-power-of-two vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:33:37 +00:00
Duncan Sands
262e04b307 An INSERT_VECTOR_ELT can insert a larger value
than the vector element type.  Don't forget to
handle this when the insertion index is not a
constant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53556 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:32:02 +00:00
Duncan Sands
8cc364c5cc According to the docs, it is possible to have an
extending load of a vector.  Handle this case when
splitting vector loads.  I'm not completely sure
what is supposed to happen, but I think it means
hi should be set to undef.  LegalizeDAG does not
consider this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:27:46 +00:00
Duncan Sands
28c05ac995 There should be no extending loads or truncating
stores of one-element vectors.  Also, neaten the
handling of INSERT_VECTOR_ELT when the inserted
type is larger than the vector element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53554 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:22:31 +00:00
Duncan Sands
d164ea2fb0 Ignore TargetConstant with an illegal type. These
are used for passing huge immediates in inline ASM
from the front-end straight down to the ASM writer.
Of course this is a hack, but it is simple, limited
in scope, works in practice, and is what LegalizeDAG
does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 17:15:45 +00:00
Evan Cheng
b9890ae3c3 Typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12 02:22:07 +00:00
Evan Cheng
79a796c2b1 Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g.
8   %reg1024<def> = IMPLICIT_DEF
12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2

The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53503 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12 01:56:02 +00:00
Evan Cheng
b5eec33dcd Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53502 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12 01:38:51 +00:00
Dan Gohman
a54cf17661 Include a frame index in the "fixed stack" pseudo source value
instead of using the frame index for the SVOffset, which was
inconsistent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 22:44:52 +00:00
Dan Gohman
5e76c3be73 Fix an obsolete top-level comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53481 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 22:39:58 +00:00
Dan Gohman
0f4012f475 Factor out debugging code into the common base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53480 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 22:36:22 +00:00
Dan Gohman
dbe2a5a269 Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 21:54:34 +00:00
Dan Gohman
dc2fbddd9d Trim unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 20:38:31 +00:00
Duncan Sands
92e0834ac7 Remove an apparently useless routine: there should
be no need to split the result of a vector RET node,
since they are always already legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53462 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 17:02:09 +00:00
Duncan Sands
ac6cecec18 It is pointless to turn a UINT_TO_FP into an
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 17:00:14 +00:00
Duncan Sands
9bed0f58eb Add two missing SINT_TO_FP libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 16:57:02 +00:00
Duncan Sands
edfba7e707 Port a shift-by-1 optimization from LegalizeDAG: it
was presumably added after the rest of the code was
copied to LegalizeTypes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53459 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 16:54:57 +00:00
Duncan Sands
dddc6291fb Add support for 128 bit shifts and 32 bit shifts
on 16 bit machines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 16:52:29 +00:00
Chris Lattner
c563e1d8fe Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticed
when working on legalizetypes.  Both legalizetypes and legalizeops now
produce hte same code for CodeGen/ARM/fcopysign.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53435 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 23:46:13 +00:00
Chris Lattner
70587ea813 make legalize types be a command line option: -enable-legalize-types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53434 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 23:37:50 +00:00
Dan Gohman
fdeb4b3f1d Make stack slot coloring's debug output more consistent with
other passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 19:49:32 +00:00