Dan Gohman
17dab19226
Fix another isFirstClassType that now needs to be isSingleValueType.
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This fixes recent CBE regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 16:57:00 +00:00
Chris Lattner
3adaa93700
we compile multiply-by-constant into horrible code. Doesn't sse4 have some
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instruction for doing this?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51473 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 04:29:53 +00:00
Evan Cheng
b1938263c7
Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks.
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Also fixed some 80 col. violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51462 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 00:37:07 +00:00
Dale Johannesen
bbcb34cafb
Put const weak stuff in appropriate section on Darwin.
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g++.dg/abi/key2.C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 00:16:59 +00:00
Evan Cheng
5bbaf01b84
X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51455 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 23:55:24 +00:00
Evan Cheng
c36c0ab44b
Add missing patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51435 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 18:56:56 +00:00
Chris Lattner
687a4cb295
fix an off-by-one error in my previous patch, don't treat the callee as a incoming arg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51422 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 06:29:38 +00:00
Chris Lattner
f6a048c3a8
Add support for multiple-return values in inline asm. This should
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get inline asm working as well as it did previously with the CBE
with the new MRV support for inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51420 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 06:19:37 +00:00
Evan Cheng
8e8de684c7
movsd and movq do not require 16-byte alignment. This fixes vec_set-5.ll on Linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51327 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 18:24:47 +00:00
Evan Cheng
a125e62117
runOnMachineFunction should set IsPIC because relocation model may have been changed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51291 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 01:56:59 +00:00
Dale Johannesen
c215b3ef5d
Handle quoted names when constructing $stub's,
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$non_lazy_ptr's and $lazy_ptr's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-19 21:38:18 +00:00
Chris Lattner
b5783106c4
trip count computation deficiency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51222 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-17 15:37:38 +00:00
Dale Johannesen
ea7dd40714
Record weak external linkage in a case where we were
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missing it. gcc.dg/darwin-weakimport-2.c.
Handle common and weak differently for darwin ppc32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51201 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 20:09:25 +00:00
Gabor Greif
7cbd8a3e92
API change for {BinaryOperator|CmpInst|CastInst}::create*() --> Create. Legacy interfaces will be in place for some time. (Merge from use-diet branch.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 19:29:10 +00:00
Dale Johannesen
f88c81e332
Treat common as distinct from weak global on Darwin x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51172 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 00:52:06 +00:00
Evan Cheng
0ef8de30fa
Fix typos and comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51165 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 22:13:02 +00:00
Evan Cheng
f0df03134e
Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 08:39:06 +00:00
Evan Cheng
bb60674191
Silence warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51129 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:33:21 +00:00
Dale Johannesen
aafce77b17
Add CommonLinkage; currently tentative definitions
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are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both. The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51118 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:12:51 +00:00
Sanjiv Gupta
2010b3eea6
Detabification. Fixed indentation and spacing.
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Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 11:31:39 +00:00
Nicolas Geoffray
9474ede38b
Fix typo in ParameterAttribute fields usage. Add an include
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to make the Cpp backend output compilable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51095 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 07:52:03 +00:00
Sanjiv Gupta
2d4e7f732a
Fixed the file description header at the top to remove the developer name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51094 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 06:50:01 +00:00
Evan Cheng
6bf877035e
Doh. Alignment is in bytes, not in bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 02:49:43 +00:00
Dan Gohman
c9f5f3f64f
Change target-specific classes to use more precise static types.
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This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 01:58:56 +00:00
Chris Lattner
3b34e1e9e8
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51062 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 19:56:20 +00:00
Evan Cheng
b656443366
- Fix the pasto in the fix for a previous pasto.
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- Incorporate Chris' comment suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 18:59:59 +00:00
Chris Lattner
7171c836a9
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51060 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 18:48:54 +00:00
Nate Begeman
32097bdbf6
Fix one more encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51057 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 17:52:09 +00:00
Evan Cheng
11b6793ede
- Don't treat anyext 16-bit load as a 32-bit load if it's volatile.
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- Correct a pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 16:45:56 +00:00
Sanjiv Gupta
0e68771536
Adding files for Microchip's PIC16 target.
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A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory.
It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register).
Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51027 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 09:02:57 +00:00
Evan Cheng
77f0b7a50a
Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
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pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 08:35:03 +00:00
Nate Begeman
c9bdb00683
Fix and encoding error in the psrad xmm, imm8 instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51020 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 01:47:52 +00:00
Evan Cheng
fa7fd33a26
On x86, it's safe to treat i32 load anyext as a normal i32 load. Ditto for i8 anyext load to i16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51019 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 00:54:02 +00:00
Dan Gohman
844731a7f1
Clean up the use of static and anonymous namespaces. This turned up
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several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 00:00:25 +00:00
Nate Begeman
0d1704b955
Teach Legalize how to scalarize VSETCC
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Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:09:43 +00:00
Evan Cheng
9bfa03c6fd
Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:04:07 +00:00
Bill Wendling
9f8fea3531
Constify the machine instruction passed into the
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"is{Trivially,Really}ReMaterializable" methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51001 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 20:54:26 +00:00
Nate Begeman
c2616e43fd
Initial X86 codegen support for VSETCC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51000 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 20:34:32 +00:00
Dan Gohman
9499b7186b
Fix a copy+paste bug; pseudo-instructions shouldn't have
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encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50997 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 20:22:45 +00:00
Evan Cheng
ad4196b44a
Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 19:56:52 +00:00
Nate Begeman
b43e9c1965
Add support for vicmp/vfcmp codegen, more legalize support coming.
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This is necessary to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50988 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 19:40:03 +00:00
Dan Gohman
2ce3898e41
Fix a compile error on compilers that still want a return value
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in a non-void function that calls abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50969 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 16:17:19 +00:00
Anton Korobeynikov
64d69102a1
Add note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50959 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-11 14:33:15 +00:00
Evan Cheng
50d9e7289b
When transforming a vector_shuffle to a load, the base address must not be an undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50940 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 06:46:49 +00:00
Dan Gohman
9018e836fe
For now, abort when an ISD::VAARG is encountered on x86-64, rather
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than silently generate invalid code.
llvm-gcc does not currently use VAArgInst; it lowers va_arg in the
front-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 01:26:14 +00:00
Evan Cheng
b70ea0bd03
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50929 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 00:59:18 +00:00
Evan Cheng
25210da757
If movl top bits are undef, let it be selected to movlps, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 00:58:41 +00:00
Evan Cheng
23573e5be6
Add a pattern to do move the low element of a v4f32 and zero extend the rest.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50922 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09 23:37:55 +00:00
Evan Cheng
d880b97257
Handle a few more cases of folding load i64 into xmm and zero top bits.
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Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50918 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09 21:53:03 +00:00
Evan Cheng
fd17f42bab
Use movq to move low half of XMM register and zero-extend the rest.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-08 22:35:02 +00:00