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Author SHA1 Message Date
Nick Lewycky
c49c0ff74c Add the remaining instructions/constant expressions as Operators so that code 
can manipulate instructions and constantexpr's uniformly. No users yet though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-19 02:26:33 +00:00
Chris Lattner
a53616d08b Remove support for parsing the "type i32" syntax for defining a numbered 
top level type without a specified number.  This syntax isn't documented
and blocks forward progress.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133371 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-19 00:03:46 +00:00
Chris Lattner
edcaca8e41 revert r133368, apparently I missed the tests to be updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133369 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 23:51:31 +00:00
Chris Lattner
8dd72b85b2 Remove support for parsing the "type i32" syntax for defining a numbered 
top level type without a specified number.  This asmprinter has never
generated this, as you can tell by no tests being updated.  It also isn't
documented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133368 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 23:38:57 +00:00
Chris Lattner
b2318662b6 fix the varargs version of StructType::get to not require an LLVMContext, making usage 
much cleaner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133364 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 22:48:56 +00:00
Chris Lattner
ea049181a0 eliminate some pointless virtual methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133363 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 22:15:47 +00:00
Chris Lattner
ebb2189904 simplify some code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133362 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 21:46:23 +00:00
Chris Lattner
fb78b33018 now that Type::getDescription() is dead, the TypePrinting class can move from Assembly/Writer.h to being 
a private class in AsmWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133361 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 21:23:04 +00:00
Chris Lattner
0cd0d88160 eliminate the Type::getDescription() method, using "<<" instead. This 
removes some gunk from LLVMContext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133360 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 21:18:23 +00:00
Chris Lattner
70d0ff1a97 improve some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133359 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 21:02:49 +00:00
Chris Lattner
7ff99a6ef2 remove an unreduced testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133356 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 19:12:59 +00:00
Chris Lattner
747fddd484 rework the remaining autoupgrade logic to use a StringRef instead of creating a 
temporary std::string for every function being checked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133355 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 18:56:39 +00:00
Benjamin Kramer
dcf0e0c44b Directly print to a raw_ostream instead of printing to a buffer first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133352 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 14:42:47 +00:00
Benjamin Kramer
1a81d48bde Simplify code. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133351 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 14:42:42 +00:00
Benjamin Kramer
4e39f8facb Simplify code. No change in functionality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133350 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 13:53:47 +00:00
Hans Wennborg
5cc6491f50 MC: Allow .common as alias for .comm assembler directive. PR10116. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133349 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 13:51:54 +00:00
Benjamin Kramer
22a54c1cd7 Don't allocate empty read-only SmallVectors during SelectionDAG deallocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133348 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 13:13:44 +00:00
Benjamin Kramer
1396c40389 Remove unused but set variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133347 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 11:09:41 +00:00
Hans Wennborg
448da519cc Fix PR10103: Less code for enum type translation. 
In cases such as the attached test, where the case value for a switch
destination is used in a phi node that follows the destination, it
might be better to replace that value with the condition value of the
switch, so that more blocks can be folded away with
TryToSimplifyUncondBranchFromEmptyBlock because there are less
conflicts in the phi node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 10:28:47 +00:00
Nick Lewycky
5a72d9f0be Add test for r133251. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 07:23:25 +00:00
Cameron Zwarich
3ebb05d9a6 When scalar replacement returns a vector type, only accept it if the vector 
type's bitwidth matches the (allocated) size of the alloca. This severely
pessimizes vector scalar replacement when the only vector type being used is
something like <3 x float> on x86 or ARM whose allocated size matches a
<4 x float>.

I hope to fix some of the flawed assumptions about allocated size throughout
scalar replacement and reenable this in most cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133338 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 06:17:51 +00:00
Chris Lattner
b85e4eba85 rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 
for pre-2.9 bitcode files.  We keep x86 unaligned loads, movnt, crc32, and the
target indep prefetch change.

As usual, updating the testsuite is a PITA.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 06:05:24 +00:00
Cameron Zwarich
6be41eb7f0 Fix an invalid bitcast crash that occurs when doing a partial memset of a vector 
alloca. Fixes part of <rdar://problem/9580800>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 05:47:49 +00:00
Cameron Zwarich
aab3ea244c Remove a pointless assignment. Nothing checks the value of VectorTy anymore now 
unless ScalarKind is Vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133335 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 05:47:45 +00:00
Jakob Stoklund Olesen
c6596e2edc Use the correct comparator to avoid depending on pointer values. 
This should fix the Linux buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133334 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 05:44:55 +00:00
Jakob Stoklund Olesen
abdbc84b4e Store CodeGenRegisters as pointers so they won't be reallocated. 
Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133333 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 04:26:06 +00:00
Jakob Stoklund Olesen
54c47c1ce9 Remove MethodProtos/MethodBodies and allocation_order_begin/end. 
Targets that need to change the default allocation order should use the
AltOrders mechanism instead. See the X86 and ARM targets for examples.

The allocation_order_begin() and allocation_order_end() methods have been
replaced with getRawAllocationOrder(), and there is further support
functions in RegisterClassInfo.

It is no longer possible to insert arbitrary code into generated
register classes. This is a feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 03:08:20 +00:00
Jakob Stoklund Olesen
4b2a174e21 Delete unneeded allocation order override. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133331 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 02:30:02 +00:00
Jakob Stoklund Olesen
0a074ed3ef Switch ARM to using AltOrders instead of MethodBodies. 
This slightly changes the GPR allocation order on Darwin where R9 is not
a callee-saved register:

Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11
After:  %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133326 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 01:14:46 +00:00
Jakob Stoklund Olesen
e8c38ca3b5 Switch x86 to using AltOrders instead of MethodBodies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133325 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 01:14:43 +00:00
Galina Kistanova
a566ec94e6 Moved to the right place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 00:59:37 +00:00
Jakob Stoklund Olesen
3b6434e360 Reserve D16-D13 on subtargets that don't support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 00:53:27 +00:00
Jakob Stoklund Olesen
b4c704877d Provide AltOrders for specifying alternative allocation orders. 
A register class can define AltOrders and AltOrderSelect instead of
defining method protos and bodies. The AltOrders lists can be defined
with set operations, and TableGen can verify that the alternative
allocation orders only contain valid registers.

This is currently an opt-in feature, and it is still possible to
override allocation_order_begin/end. That will not be true for long.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 00:50:49 +00:00
Bill Wendling
edb15d6872 * Override the "EmitBytes" function, since it can sneak values in that way. 
* Make this used only if CFI is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133319 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 00:19:35 +00:00
Eric Christopher
a3071455e5 Fix UMULO support for 2x register width to allow the full 
range without a libcall to a new mulo<mode> libcall
that we'd have to create.

Finishes the rest of rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133318 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-18 00:09:57 +00:00
Bill Wendling
ccfae86da1 Remove false assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133314 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 23:42:01 +00:00
Jakob Stoklund Olesen
bed9711ca8 Only call TRI::getRawAllocationOrder to resolve a target-dependent hint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133313 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 23:26:52 +00:00
Jakob Stoklund Olesen
8936b94776 Zap the last reference to allocation_order_begin(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133310 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 23:17:13 +00:00
Jakob Stoklund Olesen
aad458d57f SI, DI, BP, and SP don't have 8-bit sub-registers in x86 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 23:15:00 +00:00
Eric Christopher
5e687ac615 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133307 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 22:35:59 +00:00
Matt Beaumont-Gay
d3e724aeaf Fix -Asserts build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133305 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 22:21:12 +00:00
Chad Rosier
66638b2333 Revert r133285. Causing odd failures on Dragonegg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133301 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 22:08:25 +00:00
Bill Wendling
50cb96931a Disable for another investigation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 21:44:15 +00:00
Devang Patel
c013699027 Set debug loc for new preheader's terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133298 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 21:36:44 +00:00
Bill Wendling
30507ef3c3 Support only DwarfCFI or SjLj exception handling in LSDA decoder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133297 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 21:31:43 +00:00
Bill Wendling
5ba89837d7 SjLj exception handling LSDA decoding support wasn't represented correctly. Use 
the correct values, etc. In particular, the exception handling type is SjLj, not
ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133296 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 21:29:06 +00:00
Bill Wendling
2fb86a8fe6 Disable to investigate ARM failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133293 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 21:09:50 +00:00
Bill Wendling
e266ce6c6e Use the verbose asm flag instead of a new flag for decoding the LSDA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 20:55:01 +00:00
Nadav Rotem
da26ad501b Fix a bug in the type-lowering of integer-promoted elements. Add a check that 
the newly created simple type is valid before checking its legality.
Re-commit the test file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133291 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 20:54:12 +00:00
Evan Cheng
6d6c55bc27 Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133289 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-17 20:47:21 +00:00