Commit Graph

3380 Commits

Author SHA1 Message Date
Hal Finkel
c72cf87285 Add an OutPatFrag TableGen class
Unfortunately, it is currently impossible to use a PatFrag as part of an output
pattern (the part of the pattern that has instructions in it) in TableGen.
Looking at the current implementation, this was clearly intended to work (there
is already code in place to expand patterns in the output DAG), but is
currently broken by the baked-in type-checking assumption and the order in which
the pattern fragments are processed (output pattern fragments need to be
processed after the instruction definitions are processed).

Fixing this is fairly simple, but requires some way of differentiating output
patterns from the existing input patterns. The simplest way to handle this
seems to be to create a subclass of PatFrag, and so that's what I've done here.

As a simple example, this allows us to write:

def crnot : OutPatFrag<(ops node:$in),
                       (CRNOR $in, $in)>;

def       : Pat<(not i1:$in),
                (crnot $in)>;

which captures the core use case: handling of repeated subexpressions inside
of complicated output patterns.

This will be used by an upcoming commit to the PowerPC backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202450 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 00:26:56 +00:00
Craig Topper
9572b75e5b Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202344 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 03:30:36 +00:00
Craig Topper
df24b19e45 [x86] Simplify disassembler code slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202233 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-26 06:01:21 +00:00
Filip Pizlo
23ffb3ea10 Stackmaps are used for OSR exits, which is a custom kind of unwinding. Hence, they
should not be marked nounwind.

Marking them nounwind caused crashes in the WebKit FTL JIT, because if we enable 
sufficient optimizations, LLVM starts eliding compact_unwind sections (or any unwind 
data for that matter), making deoptimization via stackmaps impossible.

This changes the stackmap intrinsic to be may-throw, adds a test for exactly the 
sympton that WebKit saw, and fixes TableGen to handle un-attributed intrinsics.

Thanks to atrick and philipreames for reviewing this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201826 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-20 23:57:31 +00:00
Craig Topper
46aa7fb720 [x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remove HasREPPrefix support from disassembler table generator since its now only used by CodeGenOnly instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201767 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-20 07:59:43 +00:00
Craig Topper
fa0cf99585 Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201649 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 08:25:02 +00:00
Craig Topper
75116bc27e Put some of the X86 formats in a more logical order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201645 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 06:59:13 +00:00
Craig Topper
82a644adf2 Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 05:34:21 +00:00
Rafael Espindola
1836fe5651 Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.
This is quiet a bit less confusing now that TargetData was renamed DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201606 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-18 22:05:46 +00:00
Craig Topper
7d2bb38164 Add an x86 prefix encoding for instructions that would decode to a different instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201538 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-18 00:21:49 +00:00
Craig Topper
611c2c3804 Remove unused method declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201301 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 07:12:40 +00:00
Craig Topper
1ee7e39dd4 Remove filtering concept from X86 disassembler table generation. It's no longer necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 07:07:16 +00:00
Craig Topper
cfd14e6aea Remove special case filtering for instructions with lock prefix as they are all marked with isCodeGenOnly already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201216 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 08:09:20 +00:00
Craig Topper
56d749a86b Mark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly so they'll disappear from the disassembler table build without custom filtering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201215 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 08:02:29 +00:00
Craig Topper
ced2756280 Recommit r201059 and r201060 with hopefully a fix for its original failure.
Original commits messages:

Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.

Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201065 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 06:55:41 +00:00
Bob Wilson
70ff3e91f7 Revert r201059 and r201060.
r201059 appears to cause a crash in a bootstrapped build of clang. Craig
isn't available to look at it right now, so I'm reverting it while he
investigates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201064 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 05:28:30 +00:00
Craig Topper
a73f0e2d49 Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201060 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 01:58:12 +00:00
Craig Topper
d8fdb19a7f Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 00:50:34 +00:00
Craig Topper
a01427c15a Remove unnecessary include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-09 07:55:19 +00:00
Craig Topper
426497e2fb Remove some unnecessary code. The conditions it was checking had already been ruled out by the caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201039 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-09 07:13:41 +00:00
Oliver Stannard
c8f5d43820 LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack
According to the AAPCS, when a CPRC is allocated to the stack, all other
VFP registers should be marked as unavailable.

I have also modified the rules for allocating non-CPRCs to the stack, to make
it more explicit that all GPRs must be made unavailable. I cannot think of a
case where the old version would produce incorrect answers, so there is no test
for this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200970 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 11:19:53 +00:00
Craig Topper
a4f328f68b Delete all of the CodeGenInstructions from CodeGenTarget destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-06 06:27:59 +00:00
Craig Topper
51dd765139 Shrink the size of CodeGenInstruction a little bit by using bitfields. 32 bools seemed excessive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200829 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 09:10:40 +00:00
Craig Topper
49d687d58f Get rid of a vector copy by just making a pointer out of the reference returned by getInstructionsByEnumValue instead of assigning it to a new vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200828 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 07:56:49 +00:00
Craig Topper
725d7946c7 Fix a vector that was passed by value instead of reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 07:27:49 +00:00
Craig Topper
7583b60306 Fix a doxygen comment referencing the wrong method name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200825 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 07:21:07 +00:00
Craig Topper
3211c86b96 Add CheckChildInteger to ISelMatcher operations. Removes nearly 2000 bytes from X86 matcher table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 05:44:28 +00:00
NAKAMURA Takumi
3328a1dadc TableGen/X86RecognizableInstr.h: Prune out-of-date "@param isSSE". [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-02 10:53:36 +00:00
Craig Topper
6b6dfa5c5a Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 meaning no 0x66 prefix in any mode. Rename Opsize16->OpSize32 and OpSize->OpSize16. The classes now refer to their operand size rather than the mode in which they need a 0x66 prefix. Hopefully can merge REX_W into this as OpSize64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200626 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-02 09:25:09 +00:00
Craig Topper
3c53b6f1ec Simplify some code since VEX and EVEX instructions never have HasOpSizePrefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200625 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-02 07:46:05 +00:00
Craig Topper
1415ca1781 Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field in TSFlags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-02 07:08:01 +00:00
Craig Topper
f0b161d774 Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 08:47:06 +00:00
Craig Topper
45b8e5fa49 Move REP out of the Prefix field of the X86 format. Give it its own bit. It had special handling anyway and this enables a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200520 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 07:00:55 +00:00
Craig Topper
28d965d300 Couple minor formatting fixes to the XXXGenDAGISel.inc files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 06:42:52 +00:00
Craig Topper
01a5c17219 Delete the Matchers stored in the SmallVectors in SwitchOpcodeMatcher/SwitchTypeMatcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-29 07:06:07 +00:00
David Woodhouse
4faa861f19 Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:13:18 +00:00
David Woodhouse
4396f5d9d2 Change MCStreamer EmitInstruction interface to take subtarget info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200345 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:12:42 +00:00
Craig Topper
90790c3217 Improve handling of EnforceSmallerThan. Remove all types that are smaller from the larger set not just the smallest type from the smaller set. Ensure 'smaller' vectors have the same or fewer total bits. Similar for 'larger' vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 04:49:01 +00:00
Craig Topper
55604d9716 Don't use EnforceSmallerThan for EnforceVectorSubVectorTypeIs. EnforceSmallerThan doesn't handle vectors quite right and should really enforce that vectors have the same number of elements. Add explicit checks for vector element count differing in EnforceVectorSubVectorTypeIs instead. This removes some unnecessary type checks in X86GenDAGISel.inc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200091 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 17:40:33 +00:00
Craig Topper
858594edb0 Fix typo in commment tyep->type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200089 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 17:34:23 +00:00
Craig Topper
f6deb18968 Use isConcrete and getConcrete instead of using TypeVec directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200071 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 05:33:48 +00:00
Craig Topper
f5f44a149e Fix EnforceSmallerThan to check !hasVectorTypes on the other type instead of this type to force this type to be scalar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200070 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 05:17:38 +00:00
Craig Topper
82f50dc0c2 Remove TGValueTypes.cpp from CMakeLists.txt which I forgot to do in r200036.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 20:51:32 +00:00
Craig Topper
f3474549ba Replace tablegen uses of EVT with MVT. Add isOverloaded() to MVT to facilitate. Remove TGValueTypes.cpp since its unused now (and may have been before).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 20:50:47 +00:00
Alp Toker
ae43cab6ba Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 17:20:08 +00:00
David Woodhouse
674140fc3e ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 15:08:36 +00:00
David Woodhouse
ccbfd5b18a [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199804 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 15:08:21 +00:00
David Woodhouse
db9fa461d7 [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199803 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 15:08:08 +00:00
Craig Topper
8f74ea3fa1 Use ArrayRef to simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199712 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 07:20:05 +00:00
David Woodhouse
9334b07527 [x86] Fix disassembly of MOV16ao16 et al.
The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It
also turns out to have been unnecessary. The disassembler handles the
AdSize prefix for itself, and doesn't care about the difference between
(e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and
don't worry about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199654 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:53 +00:00