Hal Finkel c72cf87285 Add an OutPatFrag TableGen class ... Unfortunately, it is currently impossible to use a PatFrag as part of an output pattern (the part of the pattern that has instructions in it) in TableGen. Looking at the current implementation, this was clearly intended to work (there is already code in place to expand patterns in the output DAG), but is currently broken by the baked-in type-checking assumption and the order in which the pattern fragments are processed (output pattern fragments need to be processed after the instruction definitions are processed). Fixing this is fairly simple, but requires some way of differentiating output patterns from the existing input patterns. The simplest way to handle this seems to be to create a subclass of PatFrag, and so that's what I've done here. As a simple example, this allows us to write: def crnot : OutPatFrag<(ops node:$in), (CRNOR $in, $in)>; def : Pat<(not i1:$in), (crnot $in)>; which captures the core use case: handling of repeated subexpressions inside of complicated output patterns. This will be used by an upcoming commit to the PowerPC backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202450 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-28 00:26:56 +00:00
..
AsmMatcherEmitter.cpp
AsmWriterEmitter.cpp	Get rid of a vector copy by just making a pointer out of the reference returned by getInstructionsByEnumValue instead of assigning it to a new vector.	2014-02-05 07:56:49 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp	LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack	2014-02-07 11:19:53 +00:00
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp	Add an OutPatFrag TableGen class	2014-02-28 00:26:56 +00:00
CodeGenDAGPatterns.h	Add an OutPatFrag TableGen class	2014-02-28 00:26:56 +00:00
CodeGenInstruction.cpp	Shrink the size of CodeGenInstruction a little bit by using bitfields. 32 bools seemed excessive.	2014-02-05 09:10:40 +00:00
CodeGenInstruction.h	Shrink the size of CodeGenInstruction a little bit by using bitfields. 32 bools seemed excessive.	2014-02-05 09:10:40 +00:00
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp
CodeGenRegisters.h
CodeGenSchedule.cpp
CodeGenSchedule.h
CodeGenTarget.cpp	Delete all of the CodeGenInstructions from CodeGenTarget destructor.	2014-02-06 06:27:59 +00:00
CodeGenTarget.h
CTagsEmitter.cpp	Remove unnecessary include.	2014-02-09 07:55:19 +00:00
DAGISelEmitter.cpp
DAGISelMatcher.cpp	Add CheckChildInteger to ISelMatcher operations. Removes nearly 2000 bytes from X86 matcher table.	2014-02-05 05:44:28 +00:00
DAGISelMatcher.h	Add CheckChildInteger to ISelMatcher operations. Removes nearly 2000 bytes from X86 matcher table.	2014-02-05 05:44:28 +00:00
DAGISelMatcherEmitter.cpp	Add CheckChildInteger to ISelMatcher operations. Removes nearly 2000 bytes from X86 matcher table.	2014-02-05 05:44:28 +00:00
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp	Add CheckChildInteger to ISelMatcher operations. Removes nearly 2000 bytes from X86 matcher table.	2014-02-05 05:44:28 +00:00
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp	Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.	2014-02-18 22:05:46 +00:00
FixedLenDecoderEmitter.cpp	Remove unnecessary include.	2014-02-09 07:55:19 +00:00
InstrInfoEmitter.cpp	Fix a vector that was passed by value instead of reference.	2014-02-05 07:27:49 +00:00
IntrinsicEmitter.cpp	Stackmaps are used for OSR exits, which is a custom kind of unwinding. Hence, they	2014-02-20 23:57:31 +00:00
LLVMBuild.txt
Makefile
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp	Fix indentation.	2014-02-27 03:30:36 +00:00
SequenceToOffsetTable.h
SetTheory.cpp
SetTheory.h
SubtargetEmitter.cpp
TableGen.cpp
TableGenBackends.h
tdtags
X86DisassemblerShared.h	Remove filtering concept from X86 disassembler table generation. It's no longer necessary.	2014-02-13 07:07:16 +00:00
X86DisassemblerTables.cpp	Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.	2014-02-19 05:34:21 +00:00
X86DisassemblerTables.h	Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.	2014-02-19 05:34:21 +00:00
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp	[x86] Simplify disassembler code slightly.	2014-02-26 06:01:21 +00:00
X86RecognizableInstr.h	[x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remove HasREPPrefix support from disassembler table generator since its now only used by CodeGenOnly instructions.	2014-02-20 07:59:43 +00:00