Akira Hatanaka
fd1d9250b2
Add MachineMemOperands to instructions generated in storeRegToStackSlot or
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loadRegFromStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-24 03:11:18 +00:00
Akira Hatanaka
9dfd4399a9
Detect unaligned loads/stores that have been added for Mips64 support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-24 03:07:37 +00:00
Akira Hatanaka
9dbeb0284d
If target ABI is N64, LEA should be daddiu.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147232 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-24 02:59:27 +00:00
Rafael Espindola
090445967f
Move the Mips only bits of the ELF writer to lib/Target/Mips.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-22 03:03:17 +00:00
Akira Hatanaka
bc24985c5f
Local dynamic TLS model for direct object output. Create the correct TLS MIPS
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ELF relocations.
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147118 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-22 01:05:17 +00:00
Rafael Espindola
dc9a8a378d
Reduce the exposure of Triple::OSType in the ELF object writer. This will
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avoid including ADT/Triple.h in many places when the target specific bits are
moved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21 17:00:36 +00:00
Akira Hatanaka
c7541c49a9
Fix bug in zero-store peephole pattern reported in pr11615.
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The patch and test case were originally written by Mans Rullgard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21 00:31:10 +00:00
Akira Hatanaka
c79507a4dd
Expand 64-bit CTLZ nodes if target architecture does not support it. Add test
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case for DCLO and DCLZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21 00:20:27 +00:00
Akira Hatanaka
7f162743fc
Expand 64-bit CTPOP and CTTZ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21 00:14:05 +00:00
Akira Hatanaka
9aed504c82
Expand 64-bit atomic load and store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147019 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21 00:02:58 +00:00
Akira Hatanaka
c0ea04389c
Add definition of DSBH (Double Swap Bytes within Halfwords) and
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DSHD (Double Swap Halfwords within Doublewords). Add a pattern which replaces
64-bit bswap with a DSBH and DSHD pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:56:43 +00:00
Akira Hatanaka
4d2b0f3ce7
Add definition of WSBH (Word Swap Bytes within Halfwords), which is an
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instruction supported by mips32r2, and add a pattern which replaces bswap with
a ROTR and WSBH pair.
WSBW is removed since it is not an instruction the current architectures
support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:47:44 +00:00
Akira Hatanaka
e1bcd6b5c6
64-bit uint-fp conversion nodes are expanded.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:40:56 +00:00
Akira Hatanaka
9388383b34
Enable custom lowering DYNAMIC_STACKALLOC nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:35:46 +00:00
Akira Hatanaka
056a1bc40f
Set the correct stack pointer register that should be saved or restored.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147012 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:28:36 +00:00
Akira Hatanaka
2fd0475cdb
Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates
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nodes needed for multiplication. Add code for selecting 64-bit MULHS and MULHU
nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:10:57 +00:00
Akira Hatanaka
49d534bb3d
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:58:01 +00:00
Akira Hatanaka
8dc684d2a2
64-bit data directive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:52:19 +00:00
Akira Hatanaka
ef43c2de86
32-to-64-bit sext_inreg pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:40:40 +00:00
Akira Hatanaka
acb5a06f7a
Add 64-bit extload patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:36:08 +00:00
Akira Hatanaka
ab05b6c227
Add patterns for matching extloads with 64-bit address. The patterns are enabled
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only when the target ABI is N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:33:53 +00:00
Akira Hatanaka
990d639f55
Add code in MipsDAGToDAGISel for selecting constant +0.0.
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MIPS64 can generate constant +0.0 with a single DMTC1 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:25:50 +00:00
Akira Hatanaka
05c585319b
Revert part of r146995 that was accidentally commmitted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:09:36 +00:00
Akira Hatanaka
403992dc58
32-to-64-bit sign extension pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:06:20 +00:00
Akira Hatanaka
caace8abdf
Add a pattern for matching zero-store with 64-bit address. The pattern is enabled
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only when the target ABI is N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 21:50:49 +00:00
Chandler Carruth
cfb75fba73
Fix up the CMake build for the new files added in r146960, they're
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likely to stay either way that discussion ends up resolving itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 08:42:11 +00:00
David Blaikie
2d24e2a396
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 02:50:00 +00:00
Akira Hatanaka
f06cb2b207
Add patterns for matching immediates whose lower 16-bit is cleared. These
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patterns emit a single LUi instruction instead of a pair of LUi and ORi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 20:21:18 +00:00
Akira Hatanaka
8209968306
Tidy up. Simplify logic. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:52:25 +00:00
Akira Hatanaka
ee973147ac
Remove definitions of double word shift plus 32 instructions. Assembler or
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direct-object emitter should emit the appropriate shift instruction depending
on the shift amount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:44:09 +00:00
Akira Hatanaka
ed538b5271
Remove unused predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:32:20 +00:00
Akira Hatanaka
89dc8d790d
Remove the restriction on the first operand of the add node in SelectAddr.
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This change reduces the number of instructions generated.
For example,
(load (add (sub $n0, $n1), (MipsLo got(s))))
results in the following sequence of instructions:
1. sub $n2, $n0, $n1
2. lw got(s)($n2)
Previously, three instructions were needed.
1. sub $n2, $n0, $n1
2. addiu $n3, $n2, got(s)
3. lw 0($n3)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:28:37 +00:00
Akira Hatanaka
3faac0a78c
Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object
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emission is not supported yet, but a patch that adds the support should follow
soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:26:41 +00:00
Akira Hatanaka
044a784fa5
Expand .cprestore directive to multiple instructions if the offset does not fit
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in a 16-bit field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 03:09:05 +00:00
Chandler Carruth
63974b2144
Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
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undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.
Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.
Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 01:56:10 +00:00
Daniel Dunbar
b0c594fd42
LLVMBuild: Introduce a common section which currently has a list of the
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subdirectories to traverse into.
- Originally I wanted to avoid this and just autoscan, but this has one key
flaw in that new subdirectories can not automatically trigger a rerun of the
llvm-build tool. This is particularly a pain when switching back and forth
between trees where one has added a subdirectory, as the dependencies will
tend to be wrong. This will also eliminates FIXME implicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:45:54 +00:00
Akira Hatanaka
6e55ff56b8
Emit B (unconditional branch) when -relocation-model=pic and J (jump) when
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-relocation-model=static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:39:35 +00:00
Akira Hatanaka
bfcb83fa32
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:38:19 +00:00
Daniel Dunbar
4ab406d7fc
LLVMBuild: Remove trailing newline, which irked me.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:48:00 +00:00
Benjamin Kramer
5eccf67492
Mips: Don't create a dangling IR function just to get the address of a symbol.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-11 12:21:34 +00:00
Akira Hatanaka
6df7e23f0c
Rename WrapperPIC. It is now used for both pic and static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:53:17 +00:00
Akira Hatanaka
0dca9456c5
jalr should use t9 ($25) for indirect calls regardless of the relocation model
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specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:45:12 +00:00
Akira Hatanaka
7a7194b529
Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in
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MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have
call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the
target is Mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:05:38 +00:00
Akira Hatanaka
ca0747917d
Implement 64-bit support for thread local storage handling.
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- Modify lowering of global TLS address nodes.
- Modify isel of ThreadPointer.
- Wrap target global TLS address nodes that are operands of loads with WrapperPIC.
- Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be
substituted with other existing nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 20:34:32 +00:00
Akira Hatanaka
08a7d92da6
Modify class ReadHardware and add definition of 64-bit version of instruction
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RDHWR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:31:26 +00:00
Akira Hatanaka
f99c1e5a19
Add newline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:26:03 +00:00
Akira Hatanaka
be7b67368c
Add 64-bit HWR29 register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:23:52 +00:00
Akira Hatanaka
da86fa14f0
32 to 64-bit anyext pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:21:19 +00:00
Akira Hatanaka
0a18cdc372
32 to 64-bit zext pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:14:41 +00:00
Bruno Cardoso Lopes
d1bcf0dbc1
Variable cleanup. Based on past patch submittals variable names have
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been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:35:30 +00:00