Commit Graph

8308 Commits

Author SHA1 Message Date
Craig Topper
caea5e28b2 Add intrinsic forms for FMA instructions to opcode folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157917 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04 07:46:16 +00:00
Craig Topper
fc5ab24493 Add VFMADDSUB and VFMSUBADD FMA instructions to folding tables. Also add 213 forms of scalar FMA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157914 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04 07:08:21 +00:00
Craig Topper
a15f9d5311 Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03 18:58:46 +00:00
Craig Topper
529ce07c5f Rename fma4 intrinsics to just fma since they are now used for both FMA4 and FMA3. Autoupgrade support coming in a separate commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157898 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03 07:26:46 +00:00
Manman Ren
c73ea9102b Revert r157831
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03 03:14:24 +00:00
Craig Topper
57ae246a6a Use sse_load_f32/64 for scalar FMA3 intrinsic patterns instead of 128-bit loads to match instruction behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157895 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03 01:40:43 +00:00
Craig Topper
60dda38008 Add neverHasSideEffects and mayLoad to FMA3 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03 00:30:49 +00:00
Benjamin Kramer
d9b0b02561 Fix typos found by http://github.com/lyda/misspell-check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02 10:20:22 +00:00
Jakob Stoklund Olesen
396618b43a Switch all register list clients to the new MC*Iterator interface.
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 23:28:30 +00:00
Manman Ren
73c2f7f5ed X86: peephole optimization to remove cmp instruction
This patch will optimize the following:
  sub r1, r3
  cmp r3, r1 or cmp r1, r3
  bge L1
TO
  sub r1, r3
  bge L1 or ble L1

If the branch instruction can use flag from "sub", then we can eliminate
the "cmp" instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157831 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 19:49:33 +00:00
Hans Wennborg
f0234fcbc9 Implement the local-dynamic TLS model for x86 (PR3985)
This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 16:27:21 +00:00
Craig Topper
14f094bb2b Enable automatic detection of FMA3 support to allow intrinsics to be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 06:10:14 +00:00
Craig Topper
3a8172ad8d Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 06:07:48 +00:00
Craig Topper
78fc72d0f1 Add VFNSUB* instructions to folding table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:48:39 +00:00
Craig Topper
241c15ffaa Remove a trailing space and fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157801 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:34:01 +00:00
Craig Topper
d9567223e8 Tidy up. Remove trailing spaces and fix the worst of the 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:24:29 +00:00
Chad Rosier
547d8045fb Put the shiny new MCSubRegIterator to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 00:02:08 +00:00
Jakob Stoklund Olesen
ee66b417ef Add support for return value promotion in X86 calling conventions.
Patch by Yiannis Tsiouris!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:28:20 +00:00
Manman Ren
91c5346d91 X86: replace SUB with CMP if possible
This patch will optimize the following
        movq    %rdi, %rax
        subq    %rsi, %rax
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax
to
        cmpq    %rsi, %rdi
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax

Perform this optimization if the actual result of SUB is not used.

rdar: 11540023


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:20:29 +00:00
Benjamin Kramer
c8e340da82 X86: Rename the CLMUL target feature to PCLMUL.
It was renamed in gcc/gas a while ago and causes all kinds of
confusion because it was named differently in llvm and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157745 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 14:34:17 +00:00
Elena Demikhovsky
177cf1e1a3 Added FMA3 Intel instructions.
I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 09:20:20 +00:00
Craig Topper
0559a2f8ae Add intrinsic for pclmulqdq instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 04:37:40 +00:00
Chris Lattner
f186df0d3e it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly. Just optimize 3 more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157699 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:08:02 +00:00
Chris Lattner
5aaabbfe62 Extend the (abi-irrelevant) return convention to be able to return more than two values in
integer registers.  This is already supported by the fastcc convention, but it doesn't
hurt to support it in the standard conventions as well.

In cases where we can cheat at the calling convention, this allows us to avoid returning
things through memory in more cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157698 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 17:50:14 +00:00
Benjamin Kramer
77fc4b297a Port support for SSE4a extrq/insertq to the old jit code emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157685 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 09:13:55 +00:00
Benjamin Kramer
1386e9b7b1 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.
This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29 19:05:25 +00:00
Justin Holewinski
d2ea0e10cb Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
to pass around a struct instead of a large set of individual values.  This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25 16:35:28 +00:00
Eli Friedman
2db0e9ebb6 Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25 00:09:29 +00:00
Craig Topper
53146a29bc Use uint16_t to store register number in static tables to match other tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157374 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24 05:55:47 +00:00
Chad Rosier
3fb6eca0cd Tidy up naming for consistency and other cleanup. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157358 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23 23:45:10 +00:00
Craig Topper
88097819fc Tidy up spacing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23 05:44:51 +00:00
Craig Topper
82dd67a1c8 Fix indentation of wrapped line for readability. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23 03:59:53 +00:00
Craig Topper
85b9e56bac Fix constant used for pshufb mask when lowering v16i8 shuffles. Bug introduced in r157043. Fixes PR12908.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157236 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22 06:09:38 +00:00
Craig Topper
8ae97baef2 Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21 06:40:16 +00:00
Jakob Stoklund Olesen
53df9259e9 Make the global base reg GR32_NOSP.
It can sometimes be used in addressing modes that don't support %ESP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20 18:43:00 +00:00
Nadav Rotem
87d35e8c71 On Haswell, perfer storing YMM registers using a single instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157129 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 20:30:08 +00:00
Nadav Rotem
4fc8a5de44 Add support for additional in-reg vbroadcast patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157127 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 19:57:37 +00:00
Craig Topper
5084c6b0a2 Tidy up some spacing and inconsistent use of pre/post increment. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 19:14:18 +00:00
Craig Topper
769237bb92 Copy some AVX support from MCJIT to JIT. Maybe will fix PR12748.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 08:28:17 +00:00
Jim Grosbach
3e96531186 Refactor data-in-code annotations.
Use a dedicated MachO load command to annotate data-in-code regions.
This is the same format the linker produces for final executable images,
allowing consistency of representation and use of introspection tools
for both object and executable files.

Data-in-code regions are annotated via ".data_region"/".end_data_region"
directive pairs, with an optional region type.

data_region_directive := ".data_region" { region_type }
region_type := "jt8" | "jt16" | "jt32" | "jta32"
end_data_region_directive := ".end_data_region"

The previous handling of ARM-style "$d.*" labels was broken and has
been removed. Specifically, it didn't handle ARM vs. Thumb mode when
marking the end of the section.

rdar://11459456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18 19:12:01 +00:00
Craig Topper
be97ae9e89 Simplify code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18 07:07:36 +00:00
Craig Topper
b82b5abf78 Simplify handling of v16i8 shuffles and fix a missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18 06:42:06 +00:00
Evan Cheng
6100366c2f Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://11451474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16 01:54:27 +00:00
Jim Grosbach
918f55fe23 Allow MCCodeEmitter access to the target MCRegisterInfo.
Add the MCRegisterInfo to the factories and constructors.

Patch by Tom Stellard <Tom.Stellard@amd.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 17:35:52 +00:00
Dan Gohman
a6063c6e29 Rename @llvm.debugger to @llvm.debugtrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14 18:58:10 +00:00
Chad Rosier
e1093e5503 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 19:43:29 +00:00
Preston Gurd
3c579c8343 Added X86 Atom latencies to X86InstrMMX.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 14:27:12 +00:00
Hans Wennborg
228756c744 Implement initial-exec TLS model for 32-bit PIC x86
This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 10:11:01 +00:00
Dan Gohman
d4347e1af9 Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),
but it generates int3 on x86 instead of ud2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 00:19:32 +00:00
Preston Gurd
deaa3f3e52 Added X86 Atom latencies for instructions in X86InstrInfo.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156579 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10 21:58:35 +00:00