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Author SHA1 Message Date
Nuno Lopes
cb348b9b45 remove calls to calloc if the allocated memory is not used (it was already being done for malloc) 
fix a few typos found by Chad in my previous commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156110 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 22:08:19 +00:00
Sirish Pande
26f61a158b Support for target dependent Hexagon VLIW packetizer. 
This patch creates and optimizes packets as per Hexagon ISA rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 21:52:53 +00:00
Nuno Lopes
252ef566e8 add support for calloc to objectsize lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156102 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 21:19:58 +00:00
Silviu Baranga
b422d0b65e Fixed disassembler for vstm/vldm ARM VFP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156077 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 16:38:40 +00:00
Sirish Pande
71d56462a1 Extensions of Hexagon V4 instructions. 
This adds new instructions for Hexagon V4 architecture.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 16:18:50 +00:00
Nuno Lopes
a199e01d8e replace 'break's with 'return 0' in visitCallInst code for objectsize, since there is no need to fallback to visitCallSite. 
This gives a 0.9% in a test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156069 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 16:06:07 +00:00
Craig Topper
b607264550 Use 'unsigned' instead of 'int' in a few places dealing with counts of vector elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156060 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 07:26:59 +00:00
Craig Topper
6b28d356c5 Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower half correctly. Missed in r155982. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156059 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 07:12:59 +00:00
Evan Cheng
d99d68bcee Fix two-address pass's aggressive instruction commuting heuristics. It's meant 
to catch cases like:
 %reg1024<def> = MOV r1
 %reg1025<def> = MOV r0
 %reg1026<def> = ADD %reg1024, %reg1025
 r0            = MOV %reg1026

By commuting ADD, it let coalescer eliminate all of the copies. However, there
was a bug in the heuristics where it ended up commuting the ADD in:

 %reg1024<def> = MOV r0
 %reg1025<def> = MOV 0
 %reg1026<def> = ADD %reg1024, %reg1025
 r0            = MOV %reg1026

That did no benefit but rather ensure the last MOV would not be coalesced.

rdar://11355268


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156048 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 01:45:13 +00:00
Andrew Trick
f12f6dff97 Added TargetRegisterInfo::getAllocatableClass. 
The ensures that virtual registers always belong to an allocatable class.
If your target attempts to create a vreg for an operand that has no
allocatable register subclass, you will crash quickly.

This ensures that targets define register classes as intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 01:14:37 +00:00
Bill Wendling
e8cd3f2491 Whitespace cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156034 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 23:43:23 +00:00
Owen Anderson
062c0a5b58 Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 22:17:40 +00:00
Preston Gurd
c0f0a93936 For Intel Atom, use ILP scheduling always, instead of ILP for 64 bit 
and Hybrid for 32 bit, since benchmarks show ILP scheduling is better
most of the time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156028 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 22:02:02 +00:00
Preston Gurd
79bbe855cd Change the Intel Atom detection code to recognize 
Lincroft and Medfield.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156025 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 21:38:46 +00:00
Owen Anderson
363e4b90c0 Teach DAG combine that multiplication by 1.0 can always be constant folded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 21:32:35 +00:00
Jim Grosbach
2727930ab4 ARM: Add missing two-operand VBIC aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156019 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 21:11:56 +00:00
Douglas Gregor
f657da2e48 Move llvm-tblgen's StringMatcher into the TableGen library so it can 
be used by clang-tblgen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156000 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 17:32:48 +00:00
Preston Gurd
95f0cf0438 This patch continues the work of adding instruction latencies for X86 Atom, 
by providing the latencies for the instructions in X86InstrFPStack.td.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155996 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 16:03:35 +00:00
Manman Ren
e2849851b2 Revert r155853 
The commit is intended to fix rdar://10961709.
But it is the root cause of PR12720.
Revert it for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155992 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 15:24:32 +00:00
Kostya Serebryany
37cb9acac5 [tsan] typo and style (thanks to Nick Lewycky) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155986 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 13:12:19 +00:00
Bill Wendling
55e7098bbc The value held in the vector may be RAUW'ed by some of the canonicalization 
methods. Use a weak value handle to keep up with this.
PR12245


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155984 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 09:59:45 +00:00
Richard Barton
0a552d611e Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155983 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 09:43:18 +00:00
Craig Topper
a9a568a79d Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support for AsmPrinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155982 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 08:03:44 +00:00
Eli Friedman
41827f9ba2 Fix the implementation of MachOObjectFile::isSectionZeroInit so it follows the MachO spec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155976 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 02:31:28 +00:00
Jim Grosbach
39cc513870 Tidy up. Naming conventions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155960 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 23:21:41 +00:00
Jakub Staszak
dca40aa911 Remove unneeded break. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155959 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 23:08:16 +00:00
Jakub Staszak
ce00b440f5 Use dyn_cast instead of checking opcode and cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155957 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 23:06:00 +00:00
Jakub Staszak
bf14860572 Remove trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155956 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 23:04:38 +00:00
Bill Wendling
95dd442041 Strip the pointer casts off of allocas so that the selection DAG can find them. 
PR10799


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155954 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 22:50:45 +00:00
Sirish Pande
902337092f Target independent Hexagon Packetizer fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155947 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 21:28:30 +00:00
Jim Grosbach
54319e2a8c ARM: Add a few missing add->sub aliases w/ 'w' suffix. 
Aliases for adding a negative immediate when using an explicit 'w'
suffix. E.g.,
        adds.w r2, #-16
        adds.w r2, r2, #-16
        addw r2, #-16
        addw r2, #-16
        addw r2, r2, #-16

rdar://11330769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155946 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 21:17:34 +00:00
Jim Grosbach
94b590f8fa ARM: allow vanilla expressions for movw/movt. 
Expressions for movw/movt don't always have an :upper16: or :lower16:
on them and that's ok. When they don't, it's just a plain [0-65536]
immediate result, effectively the same as a :lower16: variant kind.

rdar://10550147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155941 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 20:43:21 +00:00
Preston Gurd
66413b61f0 This patch marks the X86 floating point stack registers ST0-ST7 as reserved 
in order to avoid assertion failures in the register scavenger. The assertion
failures were “Bad machine code: Using an undefined physical register” and
“Bad machine code: MBB exits via unconditional fall-through but its successor
differs from its CFG successor!”.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155930 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 19:50:22 +00:00
Jim Grosbach
686c01854e MC: Unknown assembler directives are now hard errors. 
Previously, an unsupported/unknown assembler directive issued a warning.
That's generally unsafe, and inconsistent with the behaviour of pretty
much every system assembler. Now that the MC assemblers are mature
enough to be the default on multiple targets, it's reasonable to
issue errors for these.

For target or platform directives that need to stay warnings, we
should add explicit handlers for them in, e.g., ELFAsmParser.cpp,
DarwinAsmParser.cpp, et. al., and issue the warning there.

rdar://9246275

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155926 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 18:38:27 +00:00
Jim Grosbach
25c7b6e0df MC: Remove errant EatToEndOfStatement() in asm parser. 
The caller is already responsible for eating any additional input on the
line. Putting an additional EatToEndOfStatement() in ParseStatement()
causes an entire extra statement to be consumed when treating warnings
as errors. For example, test/MC/macros.s will assert() because the
.endmacro directive is missed as a result.

rdar://11355843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155925 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 18:38:24 +00:00
Manman Ren
769ea2f93f X86: optimization for max-like struct 
This patch will optimize the following cases on X86
(a > b) ? (a-b) : 0
(a >= b) ? (a-b) : 0
(b < a) ? (a-b) : 0
(b <= a) ? (a-b) : 0

FROM
movl    %edi, %ecx
subl    %esi, %ecx
cmpl    %edi, %esi
movl    $0, %eax
cmovll  %ecx, %eax
TO
xorl    %eax, %eax
subl    %esi, %edi
cmovll  %eax, %edi
movl    %edi, %eax

rdar: 10734411


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155919 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 17:16:15 +00:00
Alexey Samsonov
d07d06ceef X86: Use StackRegister instead of FrameRegister in getFrameIndexReference (to generate debug info for local variables) if stack needs realignment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155917 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 15:16:06 +00:00
Benjamin Kramer
0998627b24 Move MipsDisassembler classes into an anonymous namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155915 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 14:34:24 +00:00
Benjamin Kramer
030a3415b0 Value-initialize global to avoid global construction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155909 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 10:48:02 +00:00
Eli Bendersky
c201e6eaf1 RuntimeDyld cleanup: 
- Improved parameter names for clarity
- Added comments
- emitCommonSymbols should return void because its return value is not being
  used anywhere
- Attempt to reduce the usage of the RelocationValueRef type. Restricts it 
  for a single goal and may serve as a step for eventual removal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155908 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 10:41:12 +00:00
Benjamin Kramer
34df1600e0 YAMLParser: get rid of global ctors & dtors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155907 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 10:19:59 +00:00
Bill Wendling
7c4ce30ea6 Change the PassManager from a reference to a pointer. 
The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 08:27:43 +00:00
Craig Topper
c80e7d2ea4 Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155899 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 07:10:32 +00:00
Eli Bendersky
d98c9e918c RuntimeDyld code cleanup: 
- There's no point having a different type for the local and global symbol
  tables.
- Renamed SymbolTable to GlobalSymbolTable to clarify the intention
- Improved const correctness where relevant



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155898 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 06:58:59 +00:00
Craig Topper
e499cdf10c Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify Bulldozer feature list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155897 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 06:54:48 +00:00
Craig Topper
ff72e74d34 Attempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155896 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 06:34:01 +00:00
Craig Topper
e106d2e2ac Make XOP imply AVX as its needed to legalize the registers types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155891 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 05:41:41 +00:00
Craig Topper
c49c6e154a Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES and HasCLMUL predicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155890 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 05:35:02 +00:00
Craig Topper
da1a984159 Make CLMUL and AES imply SSE2 since its needed to legalize the type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155888 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 05:28:32 +00:00
Craig Topper
ed39ac5026 Enable AVX and FMA4 for AMD Bulldozer processors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155885 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 05:18:13 +00:00