Commit Graph

109791 Commits

Author SHA1 Message Date
Zoran Jovanovic
cb5fadfe6a [mips][micromips] Add predicate 'InMicroMips' at CodeGen patterns for microMIPS instructions
Differential Revision: http://reviews.llvm.org/D6198


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 13:30:10 +00:00
Chandler Carruth
556578ec0c [x86] Start improving the matching of unpck instructions based on test
cases from Halide folks. This initial step was extracted from
a prototype change by Clay Wood to try and address regressions found
with Halide and the new vector shuffle lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221779 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 10:05:18 +00:00
Chandler Carruth
3baea18935 [x86] Clean up a bunch of vector shuffle tests with my script. Notably,
removes windows line endings and other noise. This is in prelude to
making substantive changes to these tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221776 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 09:17:15 +00:00
NAKAMURA Takumi
23fc2a391d MCDisassembler::getInstruction():: Prune also "\param Region", since it was removed in r221751. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221775 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 07:42:26 +00:00
Elena Demikhovsky
5f9c438577 AVX-512: Intrinsics for ERI
3 instructions: vrcp28, vrsqrt28, vexp2, only vector forms.
Intrinsics include SAE (Suppres All Exceptions) parameter.

http://reviews.llvm.org/D6214



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 07:31:03 +00:00
Jingyue Wu
ee709fe497 Reverts r221772 which fails tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221773 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 07:19:25 +00:00
Jingyue Wu
69adc159ee Disable indvar widening if arithmetics on the wider type are more expensive
Summary:
IndVarSimplify should not widen an indvar if arithmetics on the wider
indvar are more expensive than those on the narrower indvar. For
instance, although NVPTX64 treats i64 as a legal type, an ADD on i64 is
twice as expensive as that on i32, because the hardware needs to
simulate a 64-bit integer using two 32-bit integers.

Split from D6188, and based on D6195 which adds NVPTXTargetTransformInfo.

Fixes PR21148.

Test Plan:
Added @indvar_32_bit that verifies we do not widen an indvar if the arithmetics
on the wider type are more expensive.

Reviewers: jholewinski, eliben, meheff, atrick

Reviewed By: atrick

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D6196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221772 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 06:58:45 +00:00
Rafael Espindola
a43247ca4e Delete dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221770 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 04:31:19 +00:00
Bill Schmidt
fc22bfd921 [PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics
This patch enables the vec_vsx_ld and vec_vsx_st intrinsics for
PowerPC, which provide programmer access to the lxvd2x, lxvw4x,
stxvd2x, and stxvw4x instructions.

New LLVM intrinsics are provided to represent these four instructions
in IntrinsicsPowerPC.td.  These are patterned after the similar
intrinsics for lvx and stvx (Altivec).  In PPCInstrVSX.td, these
intrinsics are tied to the code gen patterns, with additional patterns
to allow plain vanilla loads and stores to still generate these
instructions.

At -O1 and higher the intrinsics are immediately converted to loads
and stores in InstCombineCalls.cpp.  This will open up more
optimization opportunities while still allowing the correct
instructions to be generated.  (Similar code exists for aligned
Altivec loads and stores.)

The new intrinsics are added to the code that checks for consecutive
loads and stores in PPCISelLowering.cpp, as well as to
PPCTargetLowering::getTgtMemIntrinsic().

There's a new test to verify the correct instructions are generated.
The loads and stores tend to be reordered, so the test just counts
their number.  It runs at -O2, as it's not very effective to test this
at -O0, when many unnecessary loads and stores are generated.

I ended up having to modify vsx-fma-m.ll.  It turns out this test case
is slightly unreliable, but I don't know a good way to prevent
problems with it.  The xvmaddmdp instructions read and write the same
register, which is one of the multiplicands.  Commutativity allows
either to be chosen.  If the FMAs are reordered differently than
expected by the test, the register assignment can be different as a
result.  Hopefully this doesn't change often.

There is a companion patch for Clang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221767 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 04:19:40 +00:00
Rafael Espindola
d0518569ec Merge StreamableMemoryObject into MemoryObject.
Every MemoryObject is a StreamableMemoryObject since the removal of
StringRefMemoryObject, so just merge the two.

I will clean up the MemoryObject interface in the upcoming commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221766 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 03:55:46 +00:00
David Blaikie
64f62a02e0 Fix non-variadic function_ref cases to match r221753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221763 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 03:28:57 +00:00
Rafael Espindola
6cf5613ddb Don't duplicate name in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 03:25:45 +00:00
Rafael Espindola
214b84bf0e Revert "Use a function_ref now that it works (r221753)."
This reverts commit r221756.

David Blaikie pointed out it was unsafe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 03:17:33 +00:00
Rafael Espindola
b0022d46da Remove unused method. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:35:31 +00:00
Rafael Espindola
ccb2a0e99a Make readBytes pure virtual. Every real implementation has it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221758 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:30:38 +00:00
Rafael Espindola
67a38a848e Remove unused method. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:27:40 +00:00
Rafael Espindola
07ac2e2da9 Use a function_ref now that it works (r221753).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221756 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:23:37 +00:00
Rafael Espindola
a48b83ebfd Remove the now unused StringRefMemoryObject.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221755 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:13:27 +00:00
David Blaikie
d9078385de Ensure function_refs are copyable even from non-const references
A subtle bug was found where attempting to copy a non-const function_ref
lvalue would actually invoke the generic forwarding constructor (as it
was a closer match - being T& rather than the const T& of the implicit
copy constructor). In the particular case this lead to a dangling
function_ref member (since it had referenced the function_ref passed by
value to its ctor, rather than the outer function_ref that was still
alive)

SFINAE the converting constructor to not be considered if the copy
constructor is available and demonstrate that this causes the copy to
refer to the original functor, not to the function_ref it was copied
from. (without the code change, the test would fail as Y would be
referencing X and Y() would see the result of the mutation to X, ie: 2)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221753 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:06:08 +00:00
Rafael Espindola
6a222ec893 Pass an ArrayRef to MCDisassembler::getInstruction.
With this patch MCDisassembler::getInstruction takes an ArrayRef<uint8_t>
instead of a MemoryObject.

Even on X86 there is a maximum size an instruction can have. Given
that, it seems way simpler and more efficient to just pass an ArrayRef
to the disassembler instead of a MemoryObject and have it do a virtual
call every time it wants some extra bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221751 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 02:04:27 +00:00
Nick Kledzik
9abbcb7453 Object, support both mach-o archive t.o.c file names
For historical reasons archives on mach-o have two possible names for the 
file containing the table of contents for the archive: "__.SYMDEF SORTED" 
and "__.SYMDEF".  But the libObject archive reader only supported the former.

This patch fixes llvm::object::Archive to support both names.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221747 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 01:37:45 +00:00
Rafael Espindola
dc70865b5b Remove a bit of dead code.
Every "real" object file implements this an ptx doesn't use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221746 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 01:27:22 +00:00
Philip Reames
25703e8fa3 Extend intrinsic name mangling to support arrays, named structs, and function types.
Currently, we have a type parameter mechanism for intrinsics. Rather than having to specify a separate intrinsic for each combination of argument and return types, we can specify a single intrinsic with one or more type parameters. These type parameters are passed explicitly to Intrinsic::getDeclaration or can be specified implicitly in the naming of the intrinsic function in an LL file.

Today, the types are limited to integer, floating point, and pointer types. With a goal of supporting symbolic targets for patchpoints and statepoints, this change adds support for function types.  The change also includes support for first class aggregate types (named structures and arrays) since these appear in function types we've encountered.  

Reviewed by: atrick, ributzka
Differential Revision: http://reviews.llvm.org/D4608



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221742 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 00:21:51 +00:00
Matt Arsenault
a735d521e7 Make TreePattern::error use Twine
The underlying error function already uses a Twine,
and most of the uses build up strings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221740 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:48:11 +00:00
Chad Rosier
7ad8db4cbb [Reassociate] Canonicalize negative constants out of expressions.
Add support for FDiv, which was regressed by the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221738 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:36:42 +00:00
Philip Reames
a03cda02ab Canonicalize an assume(load != null) into !nonnull metadata
We currently have two ways of informing the optimizer that the result of a load is never null: metadata and assume. This change converts the second in to the former. This avoids a need to implement optimizations using both forms.

We should probably extend this basic idea to metadata of other forms; in particular, range metadata. We view is that assumes should be considered a "last resort" for when there isn't a more canonical way to represent something.

Reviewed by: Hal
Differential Revision: http://reviews.llvm.org/D5951



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:33:19 +00:00
Duncan P. N. Exon Smith
4f897091e4 libLTO: Allow linker to choose context of modules and codegen
Add API for specifying which `LLVMContext` each `lto_module_t` and
`lto_code_gen_t` is in.

In particular, this enables the following flow:

    for (auto &File : Files) {
      lto_module_t M = lto_module_create_in_local_context(File...);
      querySymbols(M);
      lto_module_dispose(M);
    }

    lto_code_gen_t CG = lto_codegen_create_in_local_context();
    for (auto &File : FilesToLink) {
      lto_module_t M = lto_module_create_in_codegen_context(File..., CG);
      lto_codegen_add_module(CG, M);
      lto_module_dispose(M);
    }
    lto_codegen_compile(CG);
    lto_codegen_write_merged_modules(CG, ...);
    lto_codegen_dispose(CG);

This flow has a few benefits.

  - Only one module (two if you count the combined module in the code
    generator) is in memory at a time.

  - Metadata (and constants) from files that are parsed to query symbols
    but not linked into the code generator don't pollute the global
    context.

  - The first for loop can be parallelized, since each module is in its
    own context.

  - When the code generator is disposed, the memory from LTO gets freed.

rdar://problem/18767512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221733 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:19:23 +00:00
Sanjay Patel
4e9c3e9cee Initialize new subtarget feature variable for generating reciprocal estimate instructions.
This was missed in r221706.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221731 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:13:15 +00:00
Duncan P. N. Exon Smith
ab75fd0694 libLTO: Assert if LTOCodeGenerator and LTOModule are from different contexts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221730 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:13:10 +00:00
Juergen Ributzka
4f0d671b97 [FastISel][AArch64] Add support for fabs intrinsic.
Lower the llvm.fabs intrinsic to the 'fabs' MI instruction.

This fixes rdar://problem/18946552.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221729 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:10:44 +00:00
Duncan P. N. Exon Smith
18a16fd279 libLTO: Allow LTOModule to own a context
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221728 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:08:05 +00:00
Duncan P. N. Exon Smith
bce40075a9 libLTO: Allow LTOCodeGenerator to own a context
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221726 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:03:29 +00:00
Kostya Serebryany
d54a2bf8e1 [asan] adding ShadowOffset64 for mips64, patch by Kumar Sukhani
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221725 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:02:57 +00:00
Chad Rosier
2244d9a5d2 [Reassociate] Canonicalize negative constants out of expressions.
This is a reapplication of r221171, but we only perform the transformation
on expressions which include a multiplication.  We do not transform rem/div
operations as this doesn't appear to be safe in all cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221721 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 22:58:35 +00:00
Kostya Serebryany
abb3335f6d Move asan-coverage into a separate phase.
Summary:
This change moves asan-coverage instrumentation
into a separate Module pass.
The other part of the change in clang introduces a new flag
-fsanitize-coverage=N.
Another small patch will update tests in compiler-rt.

With this patch no functionality change is expected except for the flag name.
The following changes will make the coverage instrumentation work with tsan/msan

Test Plan: Run regression tests, chromium.

Reviewers: nlewycky, samsonov

Reviewed By: nlewycky, samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221718 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 22:14:37 +00:00
Duncan P. N. Exon Smith
5bf8ade9d0 Revert "IR: MDNode => Value"
Instead, we're going to separate metadata from the Value hierarchy.  See
PR21532.

This reverts commit r221375.
This reverts commit r221373.
This reverts commit r221359.
This reverts commit r221167.
This reverts commit r221027.
This reverts commit r221024.
This reverts commit r221023.
This reverts commit r220995.
This reverts commit r220994.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221711 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:30:22 +00:00
Tom Roeder
15d6f7c3cc Fix build break: remove unused variable in FCFI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221710 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:26:33 +00:00
Frederic Riss
6eb7964b7d Totally forget deallocated SDNodes in SDDbgInfo.
What would happen before that commit is that the SDDbgValues associated with
a deallocated SDNode would be marked Invalidated, but SDDbgInfo would keep
a map entry keyed by the SDNode pointer pointing to this list of invalidated
SDDbgNodes. As the memory gets reused, the list might get wrongly associated
with another new SDNode. As the SDDbgValues are cloned when they are transfered,
this can lead to an exponential number of SDDbgValues being produced during
DAGCombine like in http://llvm.org/bugs/show_bug.cgi?id=20893

Note that the previous behavior wasn't really buggy as the invalidation made
sure that the SDDbgValues won't be used. This commit can be considered a
memory optimization and as such is really hard to validate in a unit-test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221709 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:21:08 +00:00
Tom Roeder
63dea2c952 Add Forward Control-Flow Integrity.
This commit adds a new pass that can inject checks before indirect calls to
make sure that these calls target known locations. It supports three types of
checks and, at compile time, it can take the name of a custom function to call
when an indirect call check fails. The default failure function ignores the
error and continues.

This pass incidentally moves the function JumpInstrTables::transformType from
private to public and makes it static (with a new argument that specifies the
table type to use); this is so that the CFI code can transform function types
at call sites to determine which jump-instruction table to use for the check at
that site.

Also, this removes support for jumptables in ARM, pending further performance
analysis and discussion.

Review: http://reviews.llvm.org/D4167



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:08:02 +00:00
Colin LeMahieu
6d093fd78a [llvm-mc] Fixing case where if a file ended with non-newline whitespace or a comma it would access invalid memory.
Cleaned up parse loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221707 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:03:09 +00:00
Sanjay Patel
e7c966f067 Use rcpss/rcpps (X86) to speed up reciprocal calcs (PR21385).
This is a first step for generating SSE rcp instructions for reciprocal
calcs when fast-math allows it. This is very similar to the rsqrt optimization
enabled in D5658 ( http://reviews.llvm.org/rL220570 ).

For now, be conservative and only enable this for AMD btver2 where performance
improves significantly both in terms of latency and throughput.

We may never enable this codegen for Intel Core* chips because the divider circuits
are just too fast. On SandyBridge, divss can be as fast as 10 cycles versus the 21
cycle critical path for the rcp + mul + sub + mul + add estimate.

Follow-on patches may allow configuration of the number of Newton-Raphson refinement
steps, add AVX512 support, and enable the optimization for more chips.

More background here: http://llvm.org/bugs/show_bug.cgi?id=21385

Differential Revision: http://reviews.llvm.org/D6175



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 20:51:00 +00:00
Rafael Espindola
612f7d7e00 Simplify testcase. NFC.
Thanks to Filipe Cabecinhas for the tip.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221705 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 20:49:16 +00:00
Bill Schmidt
10161a0cce [PowerPC] Replace foul hackery with real calls to __tls_get_addr
My original support for the general dynamic and local dynamic TLS
models contained some fairly obtuse hacks to generate calls to
__tls_get_addr when lowering a TargetGlobalAddress.  Rather than
generating real calls, special GET_TLS_ADDR nodes were used to wrap
the calls and only reveal them at assembly time.  I attempted to
provide correct parameter and return values by chaining CopyToReg and
CopyFromReg nodes onto the GET_TLS_ADDR nodes, but this was also not
fully correct.  Problems were seen with two back-to-back stores to TLS
variables, where the call sequences ended up overlapping with unhappy
results.  Additionally, since these weren't real calls, the proper
register side effects of a call were not recorded, so clobbered values
were kept live across the calls.

The proper thing to do is to lower these into calls in the first
place.  This is relatively straightforward; see the changes to
PPCTargetLowering::LowerGlobalTLSAddress() in PPCISelLowering.cpp.
The changes here are standard call lowering, except that we need to
track the fact that these calls will require a relocation.  This is
done by adding a machine operand flag of MO_TLSLD or MO_TLSGD to the
TargetGlobalAddress operand that appears earlier in the sequence.

The calls to LowerCallTo() eventually find their way to
LowerCall_64SVR4() or LowerCall_32SVR4(), which call FinishCall(),
which calls PrepareCall().  In PrepareCall(), we detect the calls to
__tls_get_addr and immediately snag the TargetGlobalTLSAddress with
the annotated relocation information.  This becomes an extra operand
on the call following the callee, which is expected for nodes of type
tlscall.  We change the call opcode to CALL_TLS for this case.  Back
in FinishCall(), we change it again to CALL_NOP_TLS for 64-bit only,
since we require a TOC-restore nop following the call for the 64-bit
ABIs.

During selection, patterns in PPCInstrInfo.td and PPCInstr64Bit.td
convert the CALL_TLS nodes into BL_TLS nodes, and convert the
CALL_NOP_TLS nodes into BL8_NOP_TLS nodes.  This replaces the code
removed from PPCAsmPrinter.cpp, as the BL_TLS or BL8_NOP_TLS
nodes can now be emitted normally using their patterns and the
associated printTLSCall print method.

Finally, as a result of these changes, all references to get-tls-addr
in its various guises are no longer used, so they have been removed.

There are existing TLS tests to verify the changes haven't messed
anything up).  I've added one new test that verifies that the problem
with the original code has been fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221703 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 20:44:09 +00:00
Rafael Espindola
71c70733b7 Use a 8 bit immediate when possible.
This fixes pr21529.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 19:46:36 +00:00
Kevin Enderby
5cebd7cd1f Fix a warning about ‘r_type’ may be used uninitialized.
Thanks to Aaron Ballman for noticing this!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221696 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 19:16:45 +00:00
Dario Domizioli
949d328bee [X86][ELF] Fix PR20243 - leaf frame pointer bug with TLS access
The ISel lowering for global TLS access in PIC mode was creating a pseudo 
instruction that is later expanded to a call, but the code was not 
setting the hasCalls flag in the MachineFrameInfo alongside the adjustsStack 
flag. This caused some functions to be mistakenly recognized as leaf functions,
and this in turn affected the decision to eliminate the frame pointer.

With the fix, hasCalls is properly set and the leaf frame pointer is correctly
preserved.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221695 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 18:44:49 +00:00
Oliver Stannard
659b1491b8 LLVM incorrectly folds xor into select
LLVM replaces the SelectionDAG pattern (xor (set_cc cc x y) 1) with
(set_cc !cc x y), which is only correct when the xor has type i1.
Instead, we should check that the constant operand to the xor is all
ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221693 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 17:36:01 +00:00
Vasileios Kalintiris
328bc2f89e [mips] Add preliminary support for the MIPS II target.
Summary:
This patch enables code generation for the MIPS II target. Pre-Mips32
targets don't have the MUL instruction, so we add the correspondent
pattern that uses the MULT/MFLO combination in order to retrieve the
product.

This is WIP as we don't support code generation for select nodes due to
the lack of conditional-move instructions.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221686 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:43:55 +00:00
Vasileios Kalintiris
b001cb6423 [mips] Add hardware register name "hwr_ulr" ($29)
The canonical name when printing assembly is still $29. The reason is that
GAS does not accept "$hwr_ulr" at the moment.

This addresses the comments from r221307, which reverted the original
commit r221299.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:22:39 +00:00
Andrea Di Biagio
d6548ad013 [X86] Add missing check for 'isINSERTPSMask' in method 'isShuffleMaskLegal'.
This helps the DAGCombiner to identify more opportunities to fold shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:20:31 +00:00