Commit Graph

9098 Commits

Author SHA1 Message Date
Anton Korobeynikov
b2931f29f3 Provide correct encoding for PPC LWARX instructions.
Patch by Gary Benson!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-27 16:10:20 +00:00
Owen Anderson
1360b7d8f8 Cache subregister relationships in a set in TargetRegisterInfo to allow faster lookups.
This speeds up LiveVariables from 0.6279s to 0.6165s on kimwitu++.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52818 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-27 06:56:04 +00:00
Matthijs Kooijman
f512281d61 Make LLVM compile on DragonFly BSD (PR2499).
Patch by Hasso Tepper!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52781 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26 10:36:58 +00:00
Dale Johannesen
b5dae00325 Fixes the last x86-64 test failure in compat.exp:
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code.  The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing.  This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26 01:51:13 +00:00
Evan Cheng
ab26227c8c - Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 20:52:59 +00:00
Chris Lattner
bc52cada09 Switch the PPC backend and target-independent JIT to use the libsystem
InvalidateInstructionCache method instead of calling through
a hook on the JIT.  This is a host feature, not a target feature.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 17:18:44 +00:00
Dan Gohman
44030ce66e SimpleInstructionSelector is here no more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52725 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 16:38:59 +00:00
Dan Gohman
fd4418fc9b Remove the OrigVT member from AtomicSDNode, as it is redundant with
the base SDNode's VTList.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52722 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 16:07:49 +00:00
Mon P Wang
2887310630 Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 08:15:39 +00:00
Evan Cheng
601ca4b434 Enable two-address remat by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52701 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 01:16:38 +00:00
Dale Johannesen
a68f9013f2 Add v2f32 (MMX) type to X86. Support is primitive:
load,store,call,return,bitcast.  This is enough to
make call and return work.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52691 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 22:01:44 +00:00
Evan Cheng
9ef4ca2e81 If it's determined safe, remat MOV32r0 (i.e. xor r, r) and others as it is instead of using the longer MOV32ri instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52670 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 07:10:51 +00:00
Dan Gohman
2d0d59380a Add a note about a potential PIC optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 00:53:07 +00:00
Dan Gohman
db7991de75 Fixes for being compiled PIC on Linux. This isn't the most
general solution possible, but it's a fairly simple one.
Based on a patch from the OpenGTL project!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 00:50:01 +00:00
Dan Gohman
09d3fdc254 Remove unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-22 19:21:26 +00:00
Dan Gohman
0011dc4738 Use MachineBasicBlock::transferSuccessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52594 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 20:21:19 +00:00
Eli Friedman
2c8e64d3e4 Fix a bug with <8 x i16> shuffle lowering on X86 where parts of the
shuffle could be skipped.  The check is invalid because the loop index i 
doesn't correspond to the element actually inserted. The correct check is
already done a few lines earlier, for whether the element is already in 
the right spot, so this shouldn't have any effect on the codegen for 
code that was already correct.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 06:09:51 +00:00
Evan Cheng
082e7c12a1 Unneeded include's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52478 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 01:21:02 +00:00
Evan Cheng
359e9371b9 XOR32rr, etc. are not AsCheapAsMove, but MOV32ri, etc. are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52454 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-18 08:13:07 +00:00
Evan Cheng
fab8387384 Unbreak DECLARE isel in pic mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52439 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-18 02:48:27 +00:00
Anton Korobeynikov
0b725f17e0 Add one more 'magic' define :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52420 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 17:57:43 +00:00
Anton Korobeynikov
7a17ff7b3f Unbreak non-PPC builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52419 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 17:38:31 +00:00
Anton Korobeynikov
210539ebc4 Provide generic hooks for icache invalidation. Add PPC implementation.
Patch by Gary Benson!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52418 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 17:30:05 +00:00
Evan Cheng
851bc04533 Rather than avoiding to wrap ISD::DECLARE GV operand in X86ISD::Wrapper, simply handle it at dagisel time with x86 specific isel code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52377 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-17 02:01:22 +00:00
Evan Cheng
4e444436f2 Horizontal-add instructions are not commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 21:16:24 +00:00
Evan Cheng
35b9a7790e mpsadbw is commutable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 20:25:59 +00:00
Chris Lattner
16228c08b4 Add support for icache invalidation on non-darwin ppc systems.
Patch by Gary Benson!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52332 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 17:04:06 +00:00
Evan Cheng
58dcb0e0cd Add option to commuteInstruction() which forces it to create a new (commuted) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 07:33:11 +00:00
Chris Lattner
9e4ff94ff7 Switch from generating the int128 typedefs based on targetdata to generating
them based on the end-compiler's capabilities.  This fixes PR2453


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52297 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 04:25:29 +00:00
Andrew Lenharth
507a58ac9b add missing atomic intrinsic from gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52270 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-14 05:48:15 +00:00
Duncan Sands
d4b9c17fb7 Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores.  In fact this
is almost all of them!  There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access.  These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used.  Consider
loading an i32 but only using the lower 8 bits.  It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes.  It
is also unwise to make a load/store wider.  For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects.  (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware.  (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several.  For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores).  In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic.  My policy here is
to say that the number of processor operations for
an illegal operation is undefined.  So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok.  It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal!  That is because
operations are marked legal by default, regardless of
whether the type is legal or not.  In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation.  However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal.  So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before.  This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 19:07:40 +00:00
Anton Korobeynikov
096b461b2e Properly lower DYNAMIC_STACKALLOC - bracket all black magic with
CALLSEQ_BEGIN & CALLSEQ_END.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52225 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-11 20:16:42 +00:00
Dan Gohman
75146a6725 CPPBackend support for extractvalue and insertvalue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 14:12:10 +00:00
Dan Gohman
26825a84e9 Abort on an unrecognized opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 14:09:13 +00:00
Dan Gohman
e8e3b5585a Update the CPP backend for the ConstantFP::get API change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52144 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 14:08:11 +00:00
Rafael Espindola
d674b4e87d add support for PIC on linux x86-64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 09:52:31 +00:00
Duncan Sands
8e4eb09b1e Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 20:54:56 +00:00
Bruno Cardoso Lopes
e90ea5e81f Added FP instruction formats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52086 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 01:39:36 +00:00
Bill Wendling
a8a8f427d6 Temporarily reverting r52056. It's causing PPC to fail to bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 01:36:24 +00:00
Bruno Cardoso Lopes
dfac7cb306 Added support for FP Registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52079 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-07 21:32:41 +00:00
Evan Cheng
3e3aa86b68 Revert r52046. It broke cbe on x86 / Mac OS X.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52071 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-07 07:50:29 +00:00
Evan Cheng
929b39f0a0 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52062 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 21:00:10 +00:00
Evan Cheng
6b4a65f4e7 PPC preferred loop alignment is 16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52056 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 19:50:46 +00:00
Anton Korobeynikov
001c73e3a1 Handle assembler identifiers specially in CBE. This fixes PR2418.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52046 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 16:08:26 +00:00
Duncan Sands
83ec4b6711 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Bruno Cardoso Lopes
0af5e095ad Added custom isel for MUL, SDIVREM, UDIVREM, SMUL_LOHI and UMUL_LOHI nodes
MUL is not anymore directly matched because its a pseudoinstruction.
LogicI class fixed to zero-extend immediates. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52036 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 06:37:31 +00:00
Bruno Cardoso Lopes
07cec75913 Added custom SELECT_CC lowering
Added special isel for ADDE,SUBE and new patterns to match SUBC,ADDC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52031 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 00:58:26 +00:00
Evan Cheng
1b022cf688 Don't break strict aliasing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-05 22:59:21 +00:00
Chris Lattner
67f631dfd5 Rewrite a bunch of the CBE's inline asm code, giving it the
ability to handle indirect input operands.  This fixes PR2407.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51952 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 18:03:28 +00:00
Duncan Sands
a0fcc08e65 Change packed struct layout so that field sizes
are the same as in unpacked structs, only field
positions differ.  This only matters for structs
containing x86 long double or an apint; it may
cause backwards compatibility problems if someone
has bitcode containing a packed struct with a
field of one of those types.
The issue is that only 10 bytes are needed to
hold an x86 long double: the store size is 10
bytes, but the ABI size is 12 or 16 bytes (linux/
darwin) which comes from rounding the store size
up by the alignment.  Because it seemed silly not
to pack an x86 long double into 10 bytes in a
packed struct, this is what was done.  I now
think this was a mistake.  Reserving the ABI size
for an x86 long double field even in a packed
struct makes things more uniform: the ABI size is
now always used when reserving space for a type.
This means that developers are less likely to
make mistakes.  It also makes life easier for the
CBE which otherwise could not represent all LLVM
packed structs (PR2402).
Front-end people might need to adjust the way
they create LLVM structs - see following change
to llvm-gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 08:21:45 +00:00