Commit Graph

82 Commits

Author SHA1 Message Date
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
24446e253a Merging ISD::LOAD and ISD::LOADX. Added LoadSDNode to represent load nodes.
Chain and address ptr remains as operands. SrcValue, extending mode, extending
VT (or rather loaded VT before extension) are now instance variables of
LoadSDNode.

Introduce load / store addressing modes to represent pre- and post-indexed
load and store. Also added an additional operand offset that is only used in
post-indexed mode (i.e. base ptr += offset after load/store).

Added alignment info (not yet used) and isVolatile fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:55:20 +00:00
428e75eaef Add support for targets to declare that they use a GOT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 22:46:34 +00:00
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 06:21:35 +00:00
232c910b8a Start on my todo list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 16:07:18 +00:00
19b7e0e0ca For PR786:
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28453 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 19:21:13 +00:00
7e399c14ab Another typo. Pointed out by Nate Begeman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28353 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 18:22:14 +00:00
5beaacc189 Fix a mis-leading comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28350 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 18:08:20 +00:00
6cacaee724 There is now a default impl of this method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28336 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 22:52:11 +00:00
dae9cbe8d4 Move this code to a common place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:42:15 +00:00
a0d513ba75 Add some new methods for computing sign bit information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28144 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:26:22 +00:00
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 01:29:57 +00:00
c313c66a88 Added a virtual method isVectorClearMaskLegal to TLI. It is similar to
isShuffleMaskLegal, used to determine if it makes sense to turn a
"vector clear" (e.g. pand V, <0, -1, 0, -1> to a shuffle of the vector and
a zero vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27873 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 08:54:13 +00:00
b878151b1e Provide a default impl of LowerArguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27605 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 16:21:12 +00:00
c45420ddd2 Move isShuffleLegal from TLI to Legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27398 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 17:21:22 +00:00
e6bfffbae2 Allow targets to have fine grained control over which types various ops get
promoted to, if they desire.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 00:25:10 +00:00
79227e2906 Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:46:36 +00:00
00cc494595 Add a method useful for decimating vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27269 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:28:23 +00:00
ca6e8eafd2 Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
64-bit vector shuffle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 22:07:06 +00:00
dc26e32ec7 Add some helper methods
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26882 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 00:55:52 +00:00
714554d707 Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 21:47:42 +00:00
30b37b5f29 Add LSR hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 23:18:16 +00:00
1566d18fe2 custom lowered nodes are legal too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26561 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05 23:49:19 +00:00
33143dce15 Number of NodeTypes now exceeds 128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26503 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03 06:58:59 +00:00
00ffed0468 Add interfaces for targets to provide target-specific dag combiner optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 04:52:55 +00:00
bf57e1f456 Missing a cast previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26434 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 00:58:54 +00:00
5ee3e14127 Add C_Memory operand type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26344 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 01:10:14 +00:00
410354fe0c Make the LLVM headers "-ansi -pedantic -Wno-long-long" clean.
Patch by Martin Partel!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26313 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 16:23:43 +00:00
1efa40f6a4 split register class handling from explicit physreg handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 00:56:39 +00:00
aba3b13fb3 Pass in a value type to getRegForInlineAsmConstraint, allowing targets to
select different sets of registers depending on the type requested.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26304 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:10:29 +00:00
70804d3e14 Fix a nit sabre noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26262 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 18:06:19 +00:00
368e18d56a Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
a03a5dc7ce Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:38:30 +00:00
eac707f702 getConstraintType should be virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26041 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-07 20:13:44 +00:00
c991cf58aa Add some methods for inline asm support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25950 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 02:12:09 +00:00
de99629e2a Add a framework for eliminating instructions that produces undemanded bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 22:24:05 +00:00
cb0b555663 Clear the OpAction field before setting it. This allows a target to set
an instruction operation action to Expand, then set it to Legal later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25812 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 06:09:03 +00:00
553d8007ad Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,
making isMaskedValueZeroForTargetNode simpler, and useable from other parts
of the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:08:18 +00:00
030dae5bce Pass the address of the main MaskedValueIsZero function to allow recursion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:48:36 +00:00
e3bd778e4d Clean up the interface to ValueTypeActions, allowing Legalize to use a copy
of it more cleanly.  Double the size of OpActions, allowing it to hold actions
for any VT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25782 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 08:40:37 +00:00
7e871b28a2 remove this method I just added, now is not the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25729 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 03:43:33 +00:00
4f16e70faa add a new callback
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25727 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 03:37:03 +00:00
0aed7840ec Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25726 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 03:14:31 +00:00
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
bc9ae377d9 Add a method for inline asm support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25656 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 20:27:33 +00:00
acc398c195 First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:21:52 +00:00
d854b62afa Add a enum to specify target scheduling preference: SchedulingForLatency or
SchedulingForRegPressure. Added corresponding methods to set / get the value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25598 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:09:02 +00:00
d90ef9ef2b Provide an interface for Targets to specify their stack pointer register
for llvm.stacksave/restore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 17:47:52 +00:00
9337de8651 Oh oh... Unix is case sensitive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24928 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 01:46:59 +00:00