Commit Graph

18781 Commits

Author SHA1 Message Date
Sanjoy Das
c49542e5bb [FaultMaps] Move FaultMapParser to Object/
Summary:
That way llvm-objdump can rely on it without adding an extra dependency
on CodeGen.

This change duplicates the FaultKind enum and the code that serializes
it to a string.  I could not figure out a way to get around this without
adding a new dependency to Object

Reviewers: rafael, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10619

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240364 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 01:05:26 +00:00
Sanjay Patel
8bd59f505a [x86] generalize reassociation optimization in machine combiner to 2 instructions
Currently ( D10321, http://reviews.llvm.org/rL239486 ), we can use the machine combiner pass
to reassociate the following sequence to reduce the critical path:

A = ? op ?
B = A op X
C = B op Y
-->
A = ? op ?
B = X op Y
C = A op B

'op' is currently limited to x86 AVX scalar FP adds (with fast-math on), but in theory, it could
be any associative math/logic op (see TODO in code comment).

This patch generalizes the pattern match to ignore the instruction that defines 'A'. So instead of
a sequence of 3 adds, we now only need to find 2 dependent adds and decide if it's worth
reassociating them.

This generalization has a compile-time cost because we can now match more instruction sequences
and we rely more heavily on the machine combiner to discard sequences where reassociation doesn't
improve the critical path.

For example, in the new test case:

A = M div N
B = A add X
C = B add Y

We'll match 2 reassociation patterns, but this transform doesn't reduce the critical path:

A = M div N
B = A add Y
C = B add X

We need the combiner to reject that pattern but select this:

A = M div N
B = X add Y
C = B add A

Differential Revision: http://reviews.llvm.org/D10460



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 00:39:40 +00:00
Pawel Bylica
e903f64b10 Revert r240291: causes problems in self-hosted builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240343 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:54:07 +00:00
Alex Lorenz
f654cdae59 MIR Serialization: Introduce a lexer for machine instructions.
This commit adds a function that tokenizes the string containing
the machine instruction. This commit also adds a struct called 
'MIToken' which is used to represent the lexer's tokens.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D10521


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240323 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:37:46 +00:00
Sanjoy Das
d5732752e8 Fix MSVC build.
I had some unnecessary `typename`s left in after addressing review.
This compiled successfully with clang++ but MSVC reported an error.  Fix
the build error by removing the redundant `typename`s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:20:10 +00:00
Sanjoy Das
e0ef46e5e7 [FaultMaps] Add a parser for the __llvm__faultmaps section.
Summary:
The parser is exercised by llvm-objdump using -print-fault-maps.  As is
probably obvious, the code itself was "heavily inspired" by
http://reviews.llvm.org/D10434.

Reviewers: reames, atrick, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:03:02 +00:00
Rafael Espindola
09bbd16112 Avoid a Symbol -> Name -> Symbol conversion.
Before this we were producing a TargetExternalSymbol from a MCSymbol.
That meant extracting the symbol name and fetching the symbol again
down the pipeline.

This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the
DAG.

Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900,
allowing r240130 to be committed again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:46:53 +00:00
Alex Lorenz
2f801faafb MIR Serialization: Serialize machine instruction names.
This commit implements initial machine instruction serialization. It
serializes machine instruction names. The instructions are represented
using a YAML sequence of string literals and are a part of machine
basic block YAML mapping.

This commit introduces a class called 'MIParser' which will be used to
parse the machine instructions and operands.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10481


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:02:30 +00:00
Pawel Bylica
39befc6ca8 Fix shl folding in DAG combiner.
Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

Test Plan: A regression test included.

Reviewers: andreadb

Reviewed By: andreadb

Subscribers: andreadb, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D10602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 15:58:11 +00:00
Chandler Carruth
1e3557de0d [PM/AA] Hoist the AliasResult enum out of the AliasAnalysis class.
This will allow classes to implement the AA interface without deriving
from the class or referencing an internal enum of some other class as
their return types.

Also, to a pretty fundamental extent, concepts such as 'NoAlias',
'MayAlias', and 'MustAlias' are first class concepts in LLVM and we
aren't saving anything by scoping them heavily.

My mild preference would have been to use a scoped enum, but that
feature is essentially completely broken AFAICT. I'm extremely
disappointed. For example, we cannot through any reasonable[1] means
construct an enum class (or analog) which has scoped names but converts
to a boolean in order to test for the possibility of aliasing.

[1]: Richard Smith came up with a "solution", but it requires class
templates, and lots of boilerplate setting up the enumeration multiple
times. Something like Boost.PP could potentially bundle this up, but
even that would be quite painful and it doesn't seem realistically worth
it. The enum class solution would probably work without the need for
a bool conversion.

Differential Revision: http://reviews.llvm.org/D10495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240255 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 02:16:51 +00:00
Duncan P. N. Exon Smith
f1c527b5c1 AsmPrinter: Don't emit empty .debug_loc entries
If we don't know how to represent a .debug_loc entry, skip the entry
entirely rather than emitting an empty one.  Similarly, if a .debug_loc
list has no entries, don't create the list.

We still want to create the variables, just in an optimized-out form
that doesn't have a DW_AT_location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 16:54:56 +00:00
Duncan P. N. Exon Smith
01a8dc8ca6 AsmPrinter: Rewrite initialization of DbgVariable, NFC
There are three types of `DbgVariable`:
  - alloca variables, created based on the MMI table,
  - register variables, created based on DBG_VALUE instructions, and
  - optimized-out variables.

This commit reconfigures `DbgVariable` to make it easier to tell which
kind we have, and make initialization a little clearer.

For MMI/alloca variables, `FrameIndex.size()` must always equal
`Expr.size()`, and there shouldn't be an `MInsn`.  For register
variables (with a `MInsn`), `FrameIndex` must be empty, and `Expr`
should have 0 or 1 element depending on whether it has a complex
expression (registers with multiple locations use `DebugLocListIndex`).
Optimized-out variables shouldn't have any of these fields.

Moreover, this separates DBG_VALUE initialization until after the
variable is created, simplifying logic in a future commit that changes
`collectVariableInfo()` to stop creating empty .debug_loc entries/lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240243 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 16:50:43 +00:00
Hans Wennborg
ee16995e3d Switch lowering: add heuristic for filling leaf nodes in the weight-balanced binary search tree
Sparse switches with profile info are lowered as weight-balanced BSTs. For
example, if the node weights are {1,1,1,1,1,1000}, the right-most node would
end up in a tree by itself, bringing it closer to the top.

However, a leaf in this BST can contain up to 3 cases, and having a single
case in a leaf node as in the example means the tree might become
unnecessarily high.

This patch adds a heauristic to the pivot selection algorithm that moves more
cases into leaf nodes unless that would lower their rank. It still doesn't
yield the optimal tree in every case, but I believe it's conservatibely correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 17:14:07 +00:00
NAKAMURA Takumi
ac5e008dfd Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240213 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 06:22:04 +00:00
NAKAMURA Takumi
3d378e625c Revert r240040, "[BranchFolding] Replace custom MachineInstr with MachineInstrExpressionTrait"
It caused different emission between stage2 and stage3. Investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240212 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 06:21:48 +00:00
Sanjoy Das
ac9af6c151 [Statepoint] Remove unnecessary argument from Statepoint::getRelocates
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 00:01:03 +00:00
Sanjay Patel
30c3b2a4c2 name change: hasPattern() -> getMachineCombinerPatterns() ; NFC
This was suggested as part of D10460, but it's independent of
any functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 23:21:42 +00:00
Alex Lorenz
dc6d65201d MIR Parser: report an error when a basic block isn't found.
This commit reports an error when the MIR parser can't find
a basic block with the machine basic block's name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240174 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 20:12:03 +00:00
Alex Lorenz
260366437c MIR Serialization: Serialize the list of machine basic blocks with simple attributes.
This commit implements the initial serialization of machine basic blocks in a
machine function. Only the simple, scalar MBB attributes are serialized. The 
reference to LLVM IR's basic block is preserved when that basic block has a name.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10465


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 17:43:07 +00:00
Alexander Kornienko
cf0db29df2 Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 15:57:42 +00:00
Eric Christopher
933d2bd391 Fix "the the" in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 01:53:21 +00:00
Yi Jiang
d30c2356b0 Avoid redundant select node in early if-conversion pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 22:34:09 +00:00
Hans Wennborg
5caacef5c1 Switch lowering: enable whole-switch jump tables at -O0.
To same compile time, the analysis to find dense case-clusters in switches is
not done at -O0. However, when the whole switch is dense enough, it is easy to
turn it into a jump table, resulting in much faster code with no extra effort.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 22:22:30 +00:00
Benjamin Kramer
ec7aa02d9f [BranchFolding] Replace custom MachineInstr with MachineInstrExpressionTrait
While the hash functions are subtly different it shouldn't have an
impact. Instructions are checked with isIdenticalTo later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 20:00:03 +00:00
David Majnemer
6d136d7300 [CodeGen] Don't emit a random reference to the personality function
This should fix issues we've been seeing with Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 18:31:46 +00:00
Sanjay Patel
fd246aa0b1 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 15:53:33 +00:00
Benjamin Kramer
24e04b80a5 [AsmPrinter] Make isRepeatedByteSequence smarter about odd integer types
- zext the value to alloc size first, then check if the value repeats
  with zero padding included. If so we can still emit a .space
- Do the checking with APInt.isSplat(8), which handles non-pow2 types
- Also handle large constants (bit width > 64)
- In a ConstantArray all elements have the same type, so it's sufficient
  to check the first constant recursively and then just compare if all
  following constants are the same by pointer compare

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 23:55:17 +00:00
Sanjay Patel
a2495334bd remove unnecessary casts; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239942 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:54:46 +00:00
David Majnemer
cc714e2142 Move the personality function from LandingPadInst to Function
The personality routine currently lives in the LandingPadInst.

This isn't desirable because:
- All LandingPadInsts in the same function must have the same
  personality routine.  This means that each LandingPadInst beyond the
  first has an operand which produces no additional information.

- There is ongoing work to introduce EH IR constructs other than
  LandingPadInst.  Moving the personality routine off of any one
  particular Instruction and onto the parent function seems a lot better
  than have N different places a personality function can sneak onto an
  exceptional function.

Differential Revision: http://reviews.llvm.org/D10429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:52:32 +00:00
Ahmed Bougacha
4412d4b51f [CodeGenPrepare] Generalize inserted set from truncs to any inst.
It's been used before to avoid infinite loops caused by separate CGP
optimizations undoing one another.  We found one more such issue
caused by r238054.  To avoid it, generalize the "InsertedTruncs"
set to any inst, and use it to avoid touching those again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239938 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:44:32 +00:00
Sanjay Patel
d562b72225 fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 16:34:48 +00:00
Chandler Carruth
4d7ed3960c [PM/AA] Remove the Location typedef from the AliasAnalysis class now
that it is its own entity in the form of MemoryLocation, and update all
the callers.

This is an entirely mechanical change. References to "Location" within
AA subclases become "MemoryLocation", and elsewhere
"AliasAnalysis::Location" becomes "MemoryLocation". Hope that helps
out-of-tree folks update.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 07:18:54 +00:00
Rafael Espindola
3fea1651f6 Rename and improve emitSectionOffset.
Different object formats represent references from dwarf in different ways.

ELF uses a relocation to the referenced point (except for .dwo) and
COFF/MachO use the offset of the referenced point inside its section.

This patch renames emitSectionOffset because

* It doesn't produce an offset on ELF.
* It changes behavior depending on how DWARF is represented, so adding
dwarf to its name is probably a good thing.

The patch also adds an option to force the use of offsets.That avoids
funny looking code like

  if (!UseOffsets)
    Asm->emitSectionOffset....

It was correct, but read as if the ! was inverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239866 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 23:22:02 +00:00
Sanjay Patel
50f4bcf54e rename variables; NFC
...because I see 'StoreBW' and read it as 'store bandwidth'



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:47:19 +00:00
Sanjay Patel
2cd20fef71 extract some code into a helper function for MergeConsecutiveStores(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:05:00 +00:00
Matthias Braun
944aaeb28b VirtRegMap: Add undef flag when reading undefined subregisters.
While completely undefined registers are easy to catch and get their
<undef> flag early in ProcessImplicitDefs/RegisterCoalescer reading from
a partially defined register where just the subreg happens to be
undefined is harder to catch so we only add the undef flag in the
virtual register rewriting step.

No testcase as I cannot reproduce the problem on any of the in-tree targets at
the moment.

This fixes rdar://21387089

Differential Revision: http://reviews.llvm.org/D10470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 18:22:28 +00:00
Matthias Braun
ff881427ec TargetRegisterInfo: Make the concept of imprecise lane masks explicit
LaneMasks as given by getSubRegIndexLaneMask() have a limited number of
of bits, so for targets with more than 31 disjunct subregister there may
be cases where:

   getSubReg(Reg,A) does not overlap getSubReg(Reg,B)

but we still have

   (getSubRegIndexLaneMask(A) & getSubRegIndexLaneMask(B)) != 0.

I had hoped to keep this an implementation detail of the tablegen but as
my next commit shows we can avoid unnecessary imp-defs operands if we
know that the lane masks in use are precise.

This is in preparation to http://reviews.llvm.org/D10470.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 18:22:26 +00:00
Alex Lorenz
d8a0ff34d9 MIR Parser: Report an error when a machine function doesn't have a corresponding function.
This commit reports an error when a machine function from a MIR file that contains
LLVM IR can't find a function with the same name in the loaded LLVM IR module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10468


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 17:06:29 +00:00
Sanjay Patel
7ddee6601d propagate IR-level fast-math-flags to DAG nodes, disabled by default
This is an updated version of the patch that was checked in at:
http://reviews.llvm.org/rL237046

but subsequently reverted because it exposed a bug in the DAG Combiner:
http://reviews.llvm.org/D9893

This time, there's an enablement flag ("EnableFMFInDAG") around the code in
SelectionDAGBuilder where we copy the set of FP optimization flags from IR
instructions to DAG nodes. So, in theory, there should be no functional change
from this patch as-is, but it will allow testing with the added functionality
to proceed via "-enable-fmf-dag" passed to llc.

This patch adds the minimum plumbing necessary to use IR-level
fast-math-flags (FMF) in the backend without actually using
them for anything yet. This is a follow-on to:
http://reviews.llvm.org/rL235997

Differential Revision: http://reviews.llvm.org/D10403



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239828 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:25:43 +00:00
Matt Arsenault
5202cab841 Revert "Revert "Fix merges of non-zero vector stores""
Reapply r239539. Don't assume the collected number of
stores is the same vector size. Just take the first N
stores to fill the vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 15:51:48 +00:00
Daniel Sanders
7f5b833aa3 Replace string GNU Triples with llvm::Triple in TargetMachine::getTargetTriple(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10381


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239815 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 13:15:50 +00:00
Arnaud A. de Grandmaison
443838d8aa [MachineSink] Address post-commit review comments
The successors cache is now a local variable, making it more visible that it
is only valid for the MBB being processed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 08:57:21 +00:00
Alex Lorenz
00b6413c97 MIR Serialization: Print and parse simple machine function attributes.
This commit serializes the simple, scalar attributes from the 
'MachineFunction' class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10449


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 00:10:47 +00:00
Alex Lorenz
b3607cdd97 MIR Serialization: move the MIR printer out of the MIR printing pass.
This commit decouples the MIR printer and the MIR printing pass so
that it will be possible to move the MIR printer into a separate 
machine IR library later on.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:52:35 +00:00
Adrian Prantl
0f80e47db3 Debug Info IR: Switch DIObjCProperty to use DITypeRef.
This is a prerequisite for turning on ODR type uniquing for ObjC++.

rdar://problem/21377883

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:18:03 +00:00
Alex Lorenz
034945e8fe MIR Serialization: Create dummy functions when the MIR file doesn't have LLVM IR.
This commit creates a dummy LLVM IR function with one basic block and an unreachable
instruction for each parsed machine function when the MIR file doesn't have LLVM IR.
This change is required as the machine function analysis pass creates machine
functions only for the functions that are defined in the current LLVM module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10135


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:07:38 +00:00
Alex Lorenz
185789e9a0 MIR Serialization: Report an error when machine functions have the same name.
This commit reports an error when the MIR parser encounters a machine
function with the name that is the same as the name of a different
machine function.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10130


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 22:23:23 +00:00
Peter Collingbourne
7ffec838a2 Protection against stack-based memory corruption errors using SafeStack
This patch adds the safe stack instrumentation pass to LLVM, which separates
the program stack into a safe stack, which stores return addresses, register
spills, and local variables that are statically verified to be accessed
in a safe way, and the unsafe stack, which stores everything else. Such
separation makes it much harder for an attacker to corrupt objects on the
safe stack, including function pointers stored in spilled registers and
return addresses. You can find more information about the safe stack, as
well as other parts of or control-flow hijack protection technique in our
OSDI paper on code-pointer integrity (http://dslab.epfl.ch/pubs/cpi.pdf)
and our project website (http://levee.epfl.ch).

The overhead of our implementation of the safe stack is very close to zero
(0.01% on the Phoronix benchmarks). This is lower than the overhead of
stack cookies, which are supported by LLVM and are commonly used today,
yet the security guarantees of the safe stack are strictly stronger than
stack cookies. In some cases, the safe stack improves performance due to
better cache locality.

Our current implementation of the safe stack is stable and robust, we
used it to recompile multiple projects on Linux including Chromium, and
we also recompiled the entire FreeBSD user-space system and more than 100
packages. We ran unit tests on the FreeBSD system and many of the packages
and observed no errors caused by the safe stack. The safe stack is also fully
binary compatible with non-instrumented code and can be applied to parts of
a program selectively.

This patch is our implementation of the safe stack on top of LLVM. The
patches make the following changes:

- Add the safestack function attribute, similar to the ssp, sspstrong and
  sspreq attributes.

- Add the SafeStack instrumentation pass that applies the safe stack to all
  functions that have the safestack attribute. This pass moves all unsafe local
  variables to the unsafe stack with a separate stack pointer, whereas all
  safe variables remain on the regular stack that is managed by LLVM as usual.

- Invoke the pass as the last stage before code generation (at the same time
  the existing cookie-based stack protector pass is invoked).

- Add unit tests for the safe stack.

Original patch by Volodymyr Kuznetsov and others at the Dependable Systems
Lab at EPFL; updates and upstreaming by myself.

Differential Revision: http://reviews.llvm.org/D6094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239761 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 21:07:11 +00:00
Alex Lorenz
a15d888abf MIR Serialization: Connect the machine function analysis pass to the MIR parser.
This commit connects the machine function analysis pass (which creates machine
functions) to the MIR parser, which will initialize the machine functions 
with the state from the MIR file and reconstruct the machine IR.

This commit introduces a new interface called 'MachineFunctionInitializer',
which can be used to provide custom initialization for the machine functions.

This commit also introduces a new diagnostic class called 
'DiagnosticInfoMIRParser' which is used for MIR parsing errors.
This commit modifies the default diagnostic handling in LLVMContext - now the
the diagnostics are printed directly into llvm::errs() so that the MIR parsing 
errors can be printed with colours.  

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9928


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239753 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 20:30:22 +00:00
Sanjoy Das
18a05df213 Unbreak the build from r239740.
Do not re-use an enum name as a field name.  Some bots don't like this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 19:29:44 +00:00