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23 Commits

Author SHA1 Message Date
Eric Christopher
4ced9d418d Make the Hexagon ISelDAGToDAG pass set the subtarget dynamically 
on each runOnMachineFunction invocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232874 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-21 03:12:59 +00:00
Krzysztof Parzyszek
7b110fe366 Remove unused complex patterns for addressing modes on Hexagon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232057 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-12 16:44:50 +00:00
Benjamin Kramer
7b3db42f63 Hexagon: Remove unused InstrMapping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231809 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 18:19:16 +00:00
Colin LeMahieu
3bddb8b918 [Hexagon] Removing more V4 predicates since V4 is the required minimum. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228614 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 21:56:37 +00:00
Eric Christopher
c3bbdbba2d Migrate HexagonISelDAGToDAG to setting a subtarget pointer during 
runOnMachineFunction. Update all uses of the Subtarget accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227840 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-02 19:22:03 +00:00
Colin LeMahieu
a24e012976 [Hexagon] Adding dealloc_return encoding and absolute address stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225267 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-06 16:15:15 +00:00
Colin LeMahieu
88e5659aaf [Hexagon] Adding reg-reg indexed load forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224997 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-12-30 18:58:47 +00:00
Jyotsna Verma
798f57f9c9 [Hexagon] Add new InstrItinClass to support timing classes. 
This patch doesn't introduce any functionality change. Test cases will be
added later when v5 support is added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208349 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-05-08 18:47:08 +00:00
Rafael Espindola
4a6855441c Change the default of AsmWriterClassName and isMCAsmWriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196065 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-02 04:55:42 +00:00
Jyotsna Verma
cdfb55d15b Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore. 
No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181628 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-10 20:58:11 +00:00
Jyotsna Verma
1a35b8e2eb Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181624 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-10 20:27:34 +00:00
Jyotsna Verma
1a7eab3878 Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181235 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-06 18:49:23 +00:00
Jyotsna Verma
d4f8a6b9e9 reverting r180953 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180964 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-02 22:10:59 +00:00
Jyotsna Verma
8a3f50038f Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180953 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-02 21:21:57 +00:00
Jyotsna Verma
6ea706e40e Hexagon: Use multiclass for Jump instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180885 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-01 21:37:34 +00:00
Jyotsna Verma
3e91da24bc Move generic Hexagon subtarget information into Hexagon.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169212 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-04 04:29:16 +00:00
Andrew Trick
2661b411cc I'm introducing a new machine model to simultaneously allow simple 
subtarget CPU descriptions and support new features of
MachineScheduler.

MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.

These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.

This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-07 04:00:00 +00:00
Sirish Pande
7517bbc91a Hexagon V5 FP Support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156568 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-10 20:20:25 +00:00
Chandler Carruth
d410eaba04 Revert r155365, r155366, and r155367. All three of these have regression 
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 18:25:57 +00:00
Sirish Pande
15e56ad885 Hexagon V5 (floating point) support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155367 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 17:49:40 +00:00
Evandro Menezes
e5041e6fa8 Hexagon: enable assembler output through the MC layer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-12 17:55:53 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Tony Linthicum
b4b54153ad Hexagon backend support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-12 21:14:40 +00:00