Commit Graph

89645 Commits

Author SHA1 Message Date
Akira Hatanaka
dc2f792740 [mips] Split SelectAddr, which was used to match address patterns, into two
functions. Set AddedComplexity to determine the order in which patterns are
matched.

This simplifies selection of floating point loads/stores.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175300 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 21:20:45 +00:00
Reed Kotler
79cd411809 Remove a final dependency on the form field in tablegen; which is a remnant
of the old jit and which we don't intend to support in mips16 or micromips.
This dependency is for the testing of whether an instruction is a pseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175297 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 21:05:58 +00:00
Sebastian Pop
5661fcdde2 add ScevApplyRewriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175294 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 20:55:36 +00:00
Sebastian Pop
a9e4d3f375 add SCEVParameterRewriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175293 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 20:55:33 +00:00
Benjamin Kramer
7523437246 AsmParser: Reformat the MS asm parser to reduce nesting.
While there postpone register name printing after uniquing.
No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175292 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 20:37:21 +00:00
Paul Redmond
86cdbc9c29 enable SDISel sincos optimization for GNU environments
- add sincos to runtime library if target triple environment is GNU
- added canCombineSinCosLibcall() which checks that sincos is in the RTL and
  if the environment is GNU then unsafe fpmath is enabled (required to
  preserve errno)
- extended sincos-opt lit test

Reviewed by: Hal Finkel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175283 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 18:45:18 +00:00
Jyotsna Verma
55a98b00c1 Hexagon: Set appropriate TSFlags to the loads/stores with global address to
support constant extension.

This patch doesn't introduce any functionality changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175280 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 17:52:07 +00:00
Hal Finkel
f64a7a83be BBVectorize: Call a DAG and DAG instead of a tree
Several functions and variable names used the term 'tree' to refer
to what is actually a DAG. Correcting this mistake will, hopefully,
prevent confusion in the future.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175278 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 17:20:54 +00:00
Arnaud A. de Grandmaison
ad079b274d Fix refactoring mistake in "Teach InstCombine to work with smaller legal types..."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175273 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 15:18:17 +00:00
Arnaud A. de Grandmaison
7c5c9b39c9 Teach InstCombine to work with smaller legal types in icmp (shl %v, C1), C2
It enables to work with a smaller constant, which is target friendly for those which can compare to immediates.
It also avoids inserting a shift in favor of a trunc, which can be free on some targets.

This used to work until LLVM-3.1, but regressed with the 3.2 release.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175270 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 14:35:47 +00:00
Tim Northover
85d2760c8e AArch64: add branch fixup pass.
This is essentially a stripped-down version of the ConstandIslands pass (which
always had these two functions), providing just the features necessary for
correctness.

In particular there needs to be a way to resolve the situation where a
conditional branch's destination block ends up out of range.

This issue crops up when self-hosting for AArch64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175269 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 14:32:20 +00:00
Rafael Espindola
8a8a2dcae0 Give these callbacks hidden visibility. It is better to not export them more
than we need to and some ELF linkers complain about directly accessing symbols
with default visibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 14:15:59 +00:00
Rafael Espindola
9fa05f98e0 Don't make assumptions about the mangling of static functions in extern "C"
blocks. We still don't have consensus if we should try to change clang or
the standard, but llvm should work with compilers that implement the current
standard and mangle those functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 14:08:43 +00:00
Kostya Serebryany
74ecd214e2 [asan] support long double on 64-bit. See https://code.google.com/p/address-sanitizer/issues/detail?id=151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175266 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 12:46:06 +00:00
Benjamin Kramer
74b3c8da48 Make helpers static. Add missing include so LLVMInitializeObjCARCOpts gets C linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175264 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 12:30:38 +00:00
Tim Northover
1e8839302b AArch64: remove ConstantIsland pass & put literals in separate section.
This implements the review suggestion to simplify the AArch64 backend. If we
later discover that we *really* need the extra complexity of the
ConstantIslands pass for performance reasons it can be resurrected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175258 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 09:33:43 +00:00
Tim Northover
148ac534fc AArch64: refactor frame handling to use movz/movk for overlarge offsets.
In the near future litpools will be in a different section, which means that
any access to them is at least two instructions. This makes the case for a
movz/movk pair (if total offset <= 32-bits) even more compelling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175257 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 09:33:26 +00:00
Alexey Samsonov
c4439c3508 clang-formatize llvm-symbolizer code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175255 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 08:54:47 +00:00
Bill Wendling
94328f4ff3 Simplify the 'operator<' for the attribute object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175252 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 05:25:26 +00:00
Hal Finkel
ab90084bca BBVectorize: Cap the number of candidate pairs in each instruction group
For some basic blocks, it is possible to generate many candidate pairs for
relatively few pairable instructions. When many (tens of thousands) of these pairs
are generated for a single instruction group, the time taken to generate and
rank the different vectorization plans can become quite large. As a result, we now
cap the number of candidate pairs within each instruction group. This is done by
closing out the group once the threshold is reached (set now at 3000 pairs).

Although this will limit the overall compile-time impact, this may not be the best
way to achieve this result. It might be better, for example, to prune excessive
candidate pairs after the fact the prevent the generation of short, but highly-connected
groups. We can experiment with this in the future.

This change reduces the overall compile-time slowdown of the csa.ll test case in
PR15222 to ~5x. If 5x is still considered too large, a lower limit can be
used as the default.

This represents a functionality change, but only for very large inputs
(thus, there is no regression test).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175251 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 04:28:42 +00:00
Anna Zaks
a7e4409bb2 Revert "Simplify the attributes '<' comparison function."
This reverts commit 82c101153fe7b35bce48781fab038e1b8f31a7bd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175250 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 04:15:55 +00:00
Anna Zaks
e721025782 Revert "Fix testcase for attribute ordering."
This reverts commit 58f20a3cbfca7384fe5e25e095f18572736a4792.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 04:15:53 +00:00
Anna Zaks
03192fe600 Revert "Fix testcase for attribute ordering."
This reverts commit 997c6516ca161073a1d516ebca7c0ca7722f64e2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175248 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 04:15:50 +00:00
Bill Wendling
223b3fdc55 Fix testcase for attribute ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 01:04:46 +00:00
Reed Kotler
5cf38fd763 Fix minor mips16 issues in directives for function prologue. Probably this does
not matter but makes it more gcc compatible which avoids possible subtle
problems. Also, turned back on a disabled check in helloworld.ll. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175237 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 01:04:38 +00:00
Bill Wendling
8fd4d23415 Fix testcase for attribute ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175236 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 00:58:25 +00:00
Bill Wendling
0ec707a4e5 Simplify the attributes '<' comparison function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 00:55:08 +00:00
Akira Hatanaka
d977aacf99 [mips] Disallow moving load/store instructions past volatile instructions.
Unfortunately, I wasn't able to create a test case that demonstrates the
problem I was trying to fix with this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:54:40 +00:00
Akira Hatanaka
cd7319dc5f [mips] Replace usage of SmallSet with BitVector, which is used to keep track of
defined and used registers. Also add a few helper functions to simplify the
code. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:40:57 +00:00
Akira Hatanaka
90db35a3e7 [mips] Fix comments and coding style violations. Declare functions to be const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:20:15 +00:00
Joel Jones
48e841d41c The ARM NEON vector compare instructions take three arguments. However, the
assembler should also accept a two arg form, as the docuemntation specifies that
the first (destination) register is optional.

This patch uses TwoOperandAliasConstraint to add the two argument form.

It also fixes an 80-column formatting problem in:
  test/MC/ARM/neon-bitwise-encoding

<rdar://problem/12909419> Clang rejects ARM NEON assembly instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175221 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:18:40 +00:00
Eli Bendersky
d6f19c7163 The operand listing is very much outdated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:17:03 +00:00
Akira Hatanaka
eba97c573f [mips] Simplify code in function Filler::findDelayInstr.
1. Define and use function terminateSearch.
2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator.
3. Delete the line which checks whether an instruction is a pseudo. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175219 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:11:24 +00:00
Preston Gurd
e2e00dffdf Mark getRawBits const.
Patch by Tyler Nowicki.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 22:49:29 +00:00
Hal Finkel
97a241b173 BBVectorize: Remove the remaining instances of std::multimap
All instances of std::multimap have now been replaced by
DenseMap<K, std::vector<V> >, and this yields a speedup of 5% on the
csa.ll test case from PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 22:38:04 +00:00
Hal Finkel
6ca6d3b1ea BBVectorize: Don't store candidate pairs in a std::multimap
This is another commit on the road to removing std::multimap from
BBVectorize. This gives an ~1% speedup on the csa.ll test case
in PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 22:37:09 +00:00
Jakub Staszak
fe9b5a4f74 Simplify code. Remove "else after return".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175212 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 21:50:09 +00:00
Chad Rosier
27d844f4d0 Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175209 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 20:44:07 +00:00
Jyotsna Verma
84a2c2bbb5 Hexagon: Change insn class to support instruction encoding.
This patch doesn't introduce any functionality changes.
It adds some new fields to the Hexagon instruction classes and
changes their layout to support instruction encoding.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:57:17 +00:00
Bill Wendling
aefd14be39 s/bool/LLVMBool/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:40:27 +00:00
Bill Wendling
296756a2b5 s/bool/LLVMBool/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175203 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:39:14 +00:00
Kay Tiong Khoo
951d361c28 death to extra whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175200 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:15:14 +00:00
Bill Wendling
31cfc70705 Add two new functions to the C API:
LLVMCreateMemoryBufferWithMemoryRange - exposes MemoryBuffer::getMemBuffer
 LLVMCreateMemoryBufferWithMemoryRangeCopy - exposes MemoryBuffer::getMemBufferCopy

Patch by Moritz Maxeiner!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:11:28 +00:00
Kay Tiong Khoo
7b672ed380 added basic support for Intel ADX instructions
-feature flag, instructions definitions, test cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175196 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:08:21 +00:00
Michel Danzer
01115b1f50 R600/SI: Fix int_SI_fs_interp_constant
The important fix is that the constant interpolation value is stored in the
parameter slot P0, which is encoded as 2.

In addition, drop the SI_INTERP_CONST pseudo instruction, pass the parameter
slot as an operand to V_INTERP_MOV_F32 instead of hardcoding it there, and
add a special operand class for the parameter slots for type checking and
pretty printing.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175193 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:03:25 +00:00
Dmitry Vyukov
06121de923 include/llvm/Object/ELF.h: do debug checks only when NDEBUG
validateSymbol() is called all over the place, and it seems it's a debug check.
It significantly speedups llvm-symbolizer used in tsan/asan/msan. validateSymbol() is the second hot function and accounts for 15% of runtime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175192 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:41:42 +00:00
Nadav Rotem
6cc4b8d1eb Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:28:52 +00:00
Nadav Rotem
b39a552949 80-col
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:20:48 +00:00
Jyotsna Verma
5e3100afef Hexagon: Use multiclass for absolute addressing mode loads.
This patch doesn't introduce any functionality changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:15:29 +00:00
Weiming Zhao
7248451c43 Re-apply r175088 for bug fix 13622: Add paired register support for
inline asm with 64-bit data on ARM

Update test case to use -mtriple=arm-linux-gnueabi


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:10:21 +00:00