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dd842e12e1
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6359 Commits

Author SHA1 Message Date
Chris Lattner
dd842e12e1 Add accessor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30080 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:08:58 +00:00
Chris Lattner
3199af2874 remove #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30078 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:06:01 +00:00
Chris Lattner
c4fa386471 Simplify target construction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 18:44:02 +00:00
Rafael Espindola
bc4cec9a62 add the SETULT condition code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 13:19:16 +00:00
Rafael Espindola
5f450d2948 add more condition codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30056 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 20:24:25 +00:00
Evan Cheng
1453de5aa9 Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen. 
Suppose the TokenFactor can reach the Op:

       [Load chain]
           ^
           |
         [Load]
         ^    ^
         |    |
        /      \-
       /         |
      /          [Op]
     /          ^ ^
     |        ..  |
     |       /    |
   [TokenFactor]  |
       ^          |
       |          |
        \        /
         \      /
         [Store]

If we move the Load below the TokenFactor, we would have created a cycle in
the DAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:52:28 +00:00
Chris Lattner
aca36b9329 Use a couple of multiclass patterns to factor some integer ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30039 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:28:02 +00:00
Chris Lattner
1662239a5e remove a bunch of comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30038 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:16:22 +00:00
Evan Cheng
c9676deb23 Minor asm fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29965 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 22:14:48 +00:00
Evan Cheng
4a888584ea Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29962 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 21:42:58 +00:00
Evan Cheng
780413d462 Don't performance load/op/store transformation if op produces a floating point 
or vector result. X86 does not have load/mod/store variants of those
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:37:37 +00:00
Evan Cheng
e50794adda - Enable x86 isel preprocessing by default unless -fast is specified. 
- Also disable isel load folding if -fast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:28:33 +00:00
Jim Laskey
ce50a165c7 Handle callee saved registers in dwarf frame info (lead up to exception 
handling.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 16:24:26 +00:00
Jim Laskey
85aaf9088e Tidy up options. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 15:13:10 +00:00
Evan Cheng
82a35b34fb Avoid making unneeded load/mod/store transformation which can hurt performance. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:44:17 +00:00
Nate Begeman
06abd22b1a Make ppc64 jit kinda work right. About 2/3 of Olden passes with this, 
there are clearly some encoding bugs lurking in there somewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29949 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 02:30:59 +00:00
Evan Cheng
67afeceaf0 On Mac, print jump table entries after the function to work around a linker issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29946 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 22:14:16 +00:00
Evan Cheng
70e674e95e Add an optional pass to preprocess the DAG before x86 isel to allow selecting more load/mod/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 20:10:17 +00:00
Reid Spencer
3a9ec2463d For PR387: 
Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 01:02:49 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Evan Cheng
0b828e08f9 Do not use getTargetNode() and SelectNodeTo() which takes more than 3 
SDOperand arguments. Use the variants which take an array and number instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 08:14:06 +00:00
Chris Lattner
16c7fe5ca3 Fix target matching weights, so that ppc-darwin modules are codegen with the 
ppc target, not the itanium target, when run on an itanium machine.
This should fix the CodeGen/PowerPC regtest failures on itanium.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29903 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 21:33:05 +00:00
Evan Cheng
95514bae73 SelectNodeTo now returns a SDNode*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 08:00:10 +00:00
Evan Cheng
9ade218533 Select() no longer require Result operand by reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 05:34:46 +00:00
Evan Cheng
6da2f3268d Match tblgen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 01:07:58 +00:00
Evan Cheng
0469990e79 Match tblgen changes; clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 01:05:16 +00:00
Chris Lattner
8d3e1d6613 Give a good error message when we try to jit inline asm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29891 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 00:47:03 +00:00
Evan Cheng
1822ffbab7 Add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 23:29:06 +00:00
Evan Cheng
b9ca92661c Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The 
asm printer will print it as offset*4. e.g. bne cr0, $+8.

The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 21:54:44 +00:00
Jim Laskey
4c2c9031ac Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 19:40:59 +00:00
Rafael Espindola
755be9b3de use @ for comments 
store LR in an arbitrary stack slot
add support for writing varargs functions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29876 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 17:55:16 +00:00
Chris Lattner
bf16982e86 We compile this into: 
_swap_16:
        slwi r2, r3, 24
        rlwimi r2, r3, 8, 8, 15
        srwi r3, r2, 16
        blr

now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29864 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 23:06:02 +00:00
Chris Lattner
ad69970c4a Owen implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29863 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 23:03:33 +00:00
Rafael Espindola
cdda88cd12 add the "eq" condition code 
implement a movcond instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 17:19:08 +00:00
Rafael Espindola
6f602de3b6 create a generic bcond instruction that has a conditional code argument 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29856 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 16:13:15 +00:00
Rafael Espindola
687bc49d1a initial support for branches 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 13:45:55 +00:00
Nate Begeman
eb883af390 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it 
does emit linkable .o files in very simple cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29850 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-23 21:08:52 +00:00
Rafael Espindola
f4d40050f1 add a README.txt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29814 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-22 12:22:46 +00:00
Rafael Espindola
3c000bf817 initial support for select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29802 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 22:00:32 +00:00
Rafael Espindola
a5dfc835d4 add the and instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 13:58:59 +00:00
Rafael Espindola
3717ca965b call computeRegisterProperties 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-20 01:49:49 +00:00
Chris Lattner
5ea64fd9eb Constify some methods. Patch provided by Anton Vayvod, thanks! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 22:00:08 +00:00
Chris Lattner
5ea7a68e15 Revert this patch, the front-end has been fixed to make it unneccesary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 18:43:24 +00:00
Chris Lattner
b5bc04d38a 'g' is handled by the front-end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 18:12:28 +00:00
Andrew Lenharth
ad1ed016ce Fix handling of 'g'. Closes 883 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 17:50:12 +00:00
Rafael Espindola
f3a335cedf add a "load effective address" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 17:09:40 +00:00
Andrew Lenharth
d337295fb0 Add the 'c' constraint as needed by the linux kernel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29747 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 16:07:50 +00:00
Andrew Lenharth
c63e56ee5f Add support for S and D constraints, as needed to compile the linux kernel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29746 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 15:35:43 +00:00
Evan Cheng
eb8730d131 Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match tablegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29741 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 23:59:00 +00:00
Rafael Espindola
ec46ea34dc Declare the callee saved regs 
Remove the hard coded store and load of the link register
Implement ARMFrameInfo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29727 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 14:43:33 +00:00