Commit Graph

105775 Commits

Author SHA1 Message Date
Tilmann Scheller
2dade438d7 [AArch64] Add negative tests for the SIMD & FP LDP instructions.
LDP is unpredictable if the registers in the pair are identical, these tests check that we don't assemble instructions like that and error out instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213074 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 16:33:24 +00:00
Cameron McInally
ef886879b6 Revert r213070. It's breaking the build in MCELFStreamer::EmitInstToData(...).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213073 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 16:24:24 +00:00
Jan Vesely
7b5f8a525a R600: Implement zero undef variants of ctlz/cttz
v2: use ffbh/l if available
v3: Rebase on top of Matt's SI patches

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <tom@stellard.net>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213072 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 15:51:09 +00:00
Daniel Sanders
6d6a055c60 [mips] Correct .MIPS.abiflags fp_abi field for -mfpxx and without .module
Summary: Previously all the test cases set it after initialization with '.module fp=xx'.

Differential Revision: http://reviews.llvm.org/D4489


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213071 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 15:31:39 +00:00
Cameron McInally
160c4cb678 Add x86 patterns to match a specific add-with-carry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213070 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 15:03:32 +00:00
Andrea Di Biagio
224ffa2549 [DAGCombiner] Add more rules to fold shuffles.
This patch adds two new rules to the DAGCombiner:
 1.  shuffle (shuffle A, Undef, M0), B, M1 -> shuffle A, B, M2
 2.  shuffle (shuffle A, Undef, M0), A, M1 -> shuffle A, Undef, M2

We only do this if the combined shuffle is legal for the target.

Example:
;;
define <4 x float> @test(<4 x float> %a, <4 x float> %b) {
  %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32><i32 6, i32 0, i32 1, i32 7>
  %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32><i32 1, i32 2, i32 4, i32 5>
  ret <4 x i32> %2
}
;;

(using llc -mcpu=corei7 -march=x86-64)
Before, the x86 backend generated:
  pshufd $120, %xmm0, %xmm0
  shufps $-108, %xmm0, %xmm1
  movaps %xmm1, %xmm0

Now the x86 backend generates:
  movsd %xmm1, %xmm0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213069 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 13:26:28 +00:00
NAKAMURA Takumi
3ee5fc8618 Prune Redundant libdeps in CMake's target_link_libraries and LLVMBuild.txt.
I checked this with Release+Asserts on x86_64-mingw32. Please restore partially if this were overkill.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213064 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 11:37:03 +00:00
Andrea Di Biagio
a34d957b61 Silence a warning in conditional expression.
Fixes a gcc warning caused by a typo. A redundant assignment operation was
accidentally used as the third operand of a conditional expression.
No functional change intended.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213061 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 10:53:44 +00:00
Stepan Dyatkovskiy
99904d296d MergeFunc patch from Björn Steinbrink.
Phabricator ticket: D4246, Don't merge functions with different range metadata on call/invoke.
Thanks!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213060 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 10:46:51 +00:00
Tim Northover
fbb631183a AArch64: fall back to generic code for out of range extract/insert.
rdar://problem/17624784

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 10:00:26 +00:00
David Majnemer
218f127b63 Fix typo in comment
No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213052 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 07:11:32 +00:00
Juergen Ributzka
cce1bd7a0b [FastISel][X86] Remove no longer needed functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213051 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 06:35:53 +00:00
Juergen Ributzka
1b0266d7cb [FastISel][X86] Implement the FastLowerIntrinsicCall hook.
Rename X86VisitIntrinsicCall -> FastLowerIntrinsicCall, which effectively
implements the target hook.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213050 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 06:35:50 +00:00
Juergen Ributzka
566afe2a15 [FastISel][X86] Implement the FastLowerCall hook.
This implements the FastLowerCall hook, which is based on the DoSelectCall
function. The implementation is very similar, but the target-independent call
lowering part has been factored out.

This should also enable patchpoint intrinsic lowering for FastISel on X86.

Related to <rdar://problem/17427052>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213049 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 06:35:47 +00:00
Juergen Ributzka
a107ebd54d Revert "[FastISel][X86] Remove no longer needed functions."
Revert "[FastISel][X86] Implement the FastLowerIntrinsicCall hook."
Revert "[FastISel][X86] Implement the FastLowerCall hook."

This reverts commit r213035, r213036, and r213037 to make the
buildbots happy again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213048 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 05:23:40 +00:00
Peter Collingbourne
f32aa7addc [dfsan] Introduce an optimization to reduce the number of union queries.
Specifically, when building a union query, if we are dominated by an identical
query then use the result of that query instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213047 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 04:41:17 +00:00
Peter Collingbourne
9e0e56462d [dfsan] Move combineShadows to DFSanFunction in preparation for it to use a domtree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213046 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 04:41:14 +00:00
Peter Collingbourne
ca3c5b8722 Give SplitBlockAndInsertIfThen the ability to update a domtree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 04:40:27 +00:00
David Majnemer
0ff9c3a3ae Some targets don't prefix private symbols with dot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 03:00:41 +00:00
David Majnemer
f51bbb84ed Specify a more specific triple for constant-pool-remat-0.ll
Instead of specifying 32-bit x86, specify 32-bit x86 linux.

This test is testing a very specific behavior which changed with
WinCOFF's constant pools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 03:00:39 +00:00
David Majnemer
2067d91b1e Relax tests expecting to see CPI symbols
WinCOFF doesn't use CPI symbols, it has a different scheme for naming
constant pool entries.  Update tests to handle either appearing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213039 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:44:49 +00:00
David Majnemer
cdc1044944 CodeGen: Handle ConstantVector and undef in WinCOFF constant pools
The constant pool entry code for WinCOFF assumed that vector constants
would be formed using ConstantDataVector, it did not expect to see a
ConstantVector.  Furthermore, it did not expect undef as one of the
elements of the vector.

ConstantVectors should be handled like ConstantDataVectors, treat Undef
as zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213038 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:34:12 +00:00
Juergen Ributzka
3c0737454d [FastISel][X86] Remove no longer needed functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:22:56 +00:00
Juergen Ributzka
a7d1d3a513 [FastISel][X86] Implement the FastLowerIntrinsicCall hook.
Rename X86VisitIntrinsicCall -> FastLowerIntrinsicCall, which effectively
implements the target hook.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:22:53 +00:00
Juergen Ributzka
805486c3f9 [FastISel][X86] Implement the FastLowerCall hook.
This implements the FastLowerCall hook, which is based on the DoSelectCall
function. The implementation is very similar, but the target-independent call
lowering part has been factored out.

This should also enable patchpoint intrinsic lowering for FastISel on X86.

Related to <rdar://problem/17427052>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213035 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:22:49 +00:00
Juergen Ributzka
7a04202ef1 [FastISel] Insert patchpoint instruction before the target generated call instruction.
The patchpoint instruction should have been inserted before the target
generated call instruction to be inside the ADJSTACKDOWN/ADJSTACKUP call
sequence window.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213034 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:22:46 +00:00
Juergen Ributzka
b90f1fd9fb [FastISel] Fix patchpoint lowering to set the result register.
Always update the value map with the result register (if there is one), for the
patchpoint instruction we created to replace the target-specific call
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:22:43 +00:00
Matt Arsenault
5fbf09a69f R600: Add dag combine for copy of an illegal type.
This helps avoid redundant instructions to unpack, and repack
the vectors. Ideally we could recognize that pattern and eliminate
it. Currently v4i8 and other small element type vectors are scalarized,
so this has the added bonus of avoiding that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213031 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 02:06:31 +00:00
Matt Arsenault
832e3ffdb0 Teach computeKnownBits to look through addrspacecast.
This fixes inferring alignment through an addrspacecast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213030 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 01:55:03 +00:00
Andrea Di Biagio
e3c3920258 Improve test 'CodeGen/X86/combine-vec-shuffle-3.ll'.
Now functions 'test4', 'test9', 'test14' and 'test19' correctly perform
a move of two packed values from the high quadword of vector %b to the low
quadword of vector %a (movhlps idiom).

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213029 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 01:29:27 +00:00
Reid Kleckner
cbebdef6eb Document the maximum LLVM IR alignment, which is 1 << 29 or 0.5 GiB
Add verifier checks.  We already check these in the assembly parser, but
a frontend producing IR in memory wouldn't hit those checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213027 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 01:16:09 +00:00
Matt Arsenault
7137eb36e1 Teach GetUnderlyingObject / BasicAA about addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213025 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 00:56:40 +00:00
Nick Lewycky
5508cfd02c Revert r212572 "improve BasicAA CS-CS queries", it causes PR20303.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213024 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 00:53:38 +00:00
Matt Arsenault
2639f77252 Convert test to FileCheck.
Check the individual test functions for more useful failure errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 00:07:27 +00:00
Andrea Di Biagio
217cd18656 [DAGCombiner] Avoid calling method 'isShuffleMaskLegal' on illegal vector types.
This patch fixes a crasher in method 'DAGCombiner::visitOR' due to an invalid
call to method 'isShuffleMaskLegal'. On x86, method 'isShuffleMaskLegal'
always expects a legal vector value type in input.

With this patch, we immediately check if the input OR dag node has a legal
vector type; we only try to fold a OR dag node into a single shufflevector
if we know that the resulting shuffle will have a legal type.
This is to avoid calling method 'isShuffleMaskLegal' on a potentially
illegal vector value type.

Added a new test-case to file 'CodeGen/X86/combine-or.ll' to verify that
DAGCombiner doesn't crash in the attempt to check/combine an OR between shuffles
with illegal types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213020 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-15 00:02:32 +00:00
Matt Arsenault
b7df516d1f R600: Add denormal handling subtarget features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 23:40:49 +00:00
Matt Arsenault
5b70c8ac7e R600/SI: Default to no single precision denormals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213017 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 23:40:43 +00:00
Alp Toker
afa0ba139f Revert "Revert "Move clang feature flags settings out of LLVM core and into cfe""
It turns out this commit was fine. The problem was in the legacy build system (fixed r213010).

This reverts commit r213005.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 23:30:31 +00:00
Lang Hames
a8940be6df [RuntimeDyld] Handle endiannes differences between the host and target while
reading MachO files magic numbers in RuntimeDyld.

This is required now that we're testing cross-platform JITing (via
RuntimeDyldChecker), and should fix some issues that David Fang has seen on PPC
builds.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213012 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 23:19:50 +00:00
Adam Nemet
3afd71fc7d [X86] Specify all TSFlags bit-offsets symbolically
No functional change.

The offsets for the other bitfields are specified symbolically.  I need to
increase the size for one of the earlier fields which is easier after this
cleanup.

Why these bits are relative to VEXShift is a bit strange but that is for
another cleanup.

I made sure that the values for the enums are unchanged after this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213011 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 23:18:39 +00:00
David Majnemer
38d8be1ad8 CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF
COFF lacks a feature that other object file formats support: mergeable
sections.

To work around this, MSVC sticks constant pool entries in special COMDAT
sections so that each constant is in it's own section.  This permits
unused constants to be dropped and it also allows duplicate constants in
different translation units to get merged together.

This fixes PR20262.

Differential Revision: http://reviews.llvm.org/D4482

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213006 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:57:27 +00:00
Alp Toker
e077a904c8 Revert "Move clang feature flags settings out of LLVM core and into cfe"
This broke one of the builds, presumably side-by-side modular CMake.
Investigating.

This reverts commit r212998.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213005 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:54:22 +00:00
Alp Toker
9988c292f1 Fix a -Wunused-local-typedefs warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213002 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:46:45 +00:00
Andrea Di Biagio
7847229c31 [DAGCombiner] Add more rules to combine shuffle vector dag nodes.
This patch teaches the DAGCombiner how to fold a pair of shuffles
according to rules:
  1.  shuffle(shuffle A, B, M0), B, M1) -> shuffle(A, B, M2)
  2.  shuffle(shuffle A, B, M0), A, M1) -> shuffle(A, B, M3)

The new rules would only trigger if the resulting shuffle has legal type and
legal mask.

Added test 'combine-vec-shuffle-3.ll' to verify that DAGCombiner correctly
folds shuffles on x86 when the resulting mask is legal. Also added some negative
cases to verify that we avoid introducing illegal shuffles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213001 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:46:26 +00:00
Matt Arsenault
ff985d4218 Look through addrspacecast in IsConstantOffsetFromGlobal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213000 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:39:26 +00:00
Matt Arsenault
19d44f6ac1 Look through addrspacecast in GetPointerBaseWithConstantOffset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212999 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:39:22 +00:00
Alp Toker
18c3a47118 Move clang feature flags settings out of LLVM core and into cfe
clang r212997 incorporated these settings into its own build system.  They no
longer need to be set from LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:19:04 +00:00
David Majnemer
a539d7b4df CodeGen: Add a getSectionKind method to MachineConstantPoolEntry
This is just a helper routine, no functionality has changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212993 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 22:06:29 +00:00
Matt Arsenault
26a4201636 Convert test to FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212992 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 21:59:26 +00:00
David Majnemer
74cb271d2b ADT: Surface LowerCase argument for utohexstr
The underlying function. utohex_buffer, already supports an argument for
deciding if the hex characters should be upper or lower case.  Expose an
identical argument for utohexstr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-14 21:56:54 +00:00