Commit Graph

97545 Commits

Author SHA1 Message Date
Shuxin Yang
e26299d76e Correct a glitch in r194424 which may invalidate iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194457 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 08:33:03 +00:00
Matt Arsenault
c3f4491d91 Add new FileCheck feature to 3.4 release notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194456 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 08:05:30 +00:00
Yuchen Wu
0cbecb56fb Revert "Added basic unit test for llvm-cov."
This reverts commit r194451.

Not sure why the tests are failing on the buildbot. They run fine on my
local machine. Could it possibly be because of the endianness of the
architectures? The GCNO and GCDA files are little-endian encoded, and
llvm-cov expects it to remain that way. Is this a safe assumption?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194454 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 05:57:06 +00:00
Yuchen Wu
f42264e7e4 llvm-cov: Added call to update run/program counts.
Also updated test files that were generated from this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194453 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 04:59:08 +00:00
Yuchen Wu
d99e04db6a Added basic unit test for llvm-cov.
This test compares the output of llvm-cov against a coverage file
generated by gcov. Since the source file must be in the current
directory when reading GCNO files, the test will first cd into the
Inputs directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194451 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 04:52:53 +00:00
Matt Arsenault
86245071b5 R600/SI: Change formatting of printed registers.
Print the range of registers used with a single letter prefix.
This better matches what the shader compiler produces and
is overall less obnoxious than concatenating all of the
subregister names together.

Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1,
it will print s[0:1] and so on.

There doesn't appear to be a straightforward way
to get the actual register info in the InstPrinter,
so this parses the generated name to print with the
new syntax.

The required test changes are pretty nasty, and register
matching regexes are now worse. Since there isn't a way to
add to a variable in FileCheck, some of the tests now don't
check the exact number of registers used, but I don't think that
will be a real problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194443 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 02:35:51 +00:00
Reed Kotler
c6d4d667a8 Change the default branch instruction to be the 16 bit variety for mips16.
This has no material effect at this time since we don't have a direct
object emitter for mips16 and the assembler can't tell them apart. I
place a comment "16 bit inst" for those so that I can tell them apart in the
output. The constant island pass has only been minimally changed to allow
this. More complete branch work is forthcoming but this is the first
step.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 02:27:12 +00:00
Reid Kleckner
161dd53f1e Extract a bc attr parsing helper that returns Attribute::None on error
The parsing method still returns llvm::error_code for consistency with
other parsing methods.  Minor cleanup, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194437 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 01:31:00 +00:00
Matt Arsenault
e57a8a3d10 R600/SI: Add test that fails due to requiring i64 mul for pointers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194433 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 23:31:02 +00:00
Lang Hames
e7e66cfe9a Lower X86::MORESTACK_RET and X86::MORESTACK_RET_RESTORE_R10 in
X86AsmPrinter::EmitInstruction, rather than X86MCInstLower::Lower.

The aim is to improve the reusability of the X86MCInstLower class by making it
more function-like. The X86::MORESTACK_RET_RESTORE_R10 pseudo broke the
function model by emitting an extra instruction to the MCStreamer attached to
the AsmPrinter.

The patch should have no impact on generated code. 
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194431 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 23:00:41 +00:00
Andrew Trick
01846af6ed Fix the recently added anyregcc convention to handle spilled operands.
Fixes <rdar://15432754> [JS] Assertion: "Folded a def to a non-store!"

The primary purpose of anyregcc is to prevent a patchpoint's call
arguments and return value from being spilled. They must be available
in a register, although the calling convention does not pin the
register. It's up to the front end to avoid using this convention for
calls with more arguments than allocatable registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194428 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 22:40:25 +00:00
Andrew Trick
5a34980b4e Print new JavaScript calling conventions symbolically.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194427 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 22:40:22 +00:00
Vincent Lejeune
70a7d5ddb4 R600: Use function inputs to represent data stored in gpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 22:10:24 +00:00
Shuxin Yang
6c7a7c6474 Fix PR17952.
The symptom is that an assertion is triggered. The assertion was added by
me to detect the situation when value is propagated from dead blocks.
(We can certainly get rid of assertion; it is safe to do so, because propagating
 value from dead block to alive join node is certainly ok.)

  The root cause of this bug is : edge-splitting is conducted on the fly,
the edge being split could be a dead edge, therefore the block that 
split the critial edge needs to be flagged "dead" as well.

  There are 3 ways to fix this bug:
  1) Get rid of the assertion as I mentioned eariler 
  2) When an dead edge is split, flag the inserted block "dead".
  3) proactively split the critical edges connecting dead and live blocks when
     new dead blocks are revealed.

  This fix go for 3) with additional 2 LOC.

  Testing case was added by Rafael the other day.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194424 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 22:00:23 +00:00
Akira Hatanaka
5635de519a [mips] Partially revert r193641. Stack alignment should not be determined by
the floating point register mode.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194423 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 21:49:03 +00:00
Simon Atanasyan
fe9ce427d0 Add support for DT_VERxxx and DT_MIPS_xxx .dynamic section entries to the
llvm-readobj.

The patch reviewed by Michael Spencer.
http://llvm-reviews.chandlerc.com/D2113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 20:51:48 +00:00
Bob Wilson
2531651206 Change libLTO back to linking with @executable_path instead of @rpath.
This partially reverts r187641 until ld64 adopts a change to link with an
rpath setting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194418 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 20:08:24 +00:00
Arnaud A. de Grandmaison
d736763847 CalcSpillWeights: allow overidding the spill weight normalizing function
This will enable the PBQP register allocator to provide its own normalizing function.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:56:14 +00:00
Artyom Skrobov
ef572e31e2 [ARM] Add support for MVFR2 which is new in ARMv8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194416 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:56:13 +00:00
Andrew Kaylor
559d409633 Fixing a problem with iterator validity in RuntimeDyldImpl::resolveExternalSymbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194415 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:55:10 +00:00
Justin Holewinski
07a5d3dc3d [NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:28:19 +00:00
Justin Holewinski
0df3ce333b [NVPTX] Fix logic error in loading vector parameters of more than 4 components
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194409 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:28:16 +00:00
Chad Rosier
4c433cf673 [AArch64] The shift right/left and insert immediate builtins expect 3
source operands, a vector, an element to insert, and a shift amount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194406 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:11:11 +00:00
Arnaud A. de Grandmaison
095f994ba6 CalcSpillWeights: give a better describing name to calculateSpillWeights
Besides, this relates it more obviously to the VirtRegAuxInfo::calculateSpillWeightAndHint.

No functionnal change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:04:45 +00:00
Eric Christopher
953398916c Unify the adding of enumerators with the construction of the enumeration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 18:52:39 +00:00
Eric Christopher
6129002232 Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 18:52:36 +00:00
Eric Christopher
62af0c295a 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 18:52:33 +00:00
Eric Christopher
883ed6bd95 Just pass the DIComposite type by value instead of by pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 18:52:31 +00:00
Chad Rosier
30b2a19f3b [AArch64] Add support for NEON scalar floating-point convert to fixed-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 18:04:07 +00:00
Daniel Sanders
028e4d27b1 Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too
Reviewers: dsanders

Reviewed By: dsanders

CC: llvm-commits, nadav

Differential Revision: http://llvm-reviews.chandlerc.com/D1958

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 17:23:41 +00:00
Matheus Almeida
12f06e1e09 [mips][msa] CHECK-DAG-ize MSA 3r-a.ll test.
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 16:46:20 +00:00
Matheus Almeida
e7a21331b5 [mips][msa] CHECK-DAG-ize MSA 2rf_int_float.ll test.
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194390 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 16:38:55 +00:00
Matheus Almeida
9d48b69e37 [mips][msa] CHECK-DAG-ize MSA 2rf_float_int.ll test.
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194389 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 16:31:46 +00:00
Renato Golin
4921d5b0a9 Move debug message in vectorizer
No functional change, just better reporting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194388 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 16:27:35 +00:00
Matheus Almeida
1b2034d969 [mips][msa] CHECK-DAG-ize MSA 2rf.ll test.
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 16:24:53 +00:00
Matheus Almeida
416a158893 [mips][msa] CHECK-DAG-ize MSA 2r.ll test.
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 16:16:53 +00:00
Rafael Espindola
a2b3882c10 Add a testcase for pr17852.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194385 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 15:37:52 +00:00
Hal Finkel
f14beced2b Add PPC option for full register names in asm
On non-Darwin PPC systems, we currently strip off the register name prefix
prior to instruction printing. So instead of something like this:

  mr r3, r4

we print this:

  mr 3, 4

The first form is the default on Darwin, and is understood by binutils, but not
yet understood by our integrated assembler. Once our integrated-as understands
full register names as well, this temporary option will be replaced by tying
this functionality to the verbose-asm option. The numeric-only form is
compatible with legacy assemblers and tools, and is also gcc's default on most
PPC systems. On the other hand, it is harder to read, and there are some
analysis tools that expect full register names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194384 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:58:40 +00:00
Benjamin Kramer
877ca3418f Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194383 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:54:34 +00:00
Peter Zotov
fa6ab4393e [OCaml] Add missing Llvm_target functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194382 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:47:28 +00:00
Peter Zotov
786a43e2d8 [OCaml] Accept context explicitly in Llvm_target functions
Llvm_target.intptr_type used to implicitly use global context. As
none of other functions in OCaml bindings do, it is changed to
accept context explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194381 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:47:20 +00:00
Peter Zotov
26f3bd8966 [OCaml] Make Llvm_target.DataLayout.t automatically managed
This breaks the API by removing Llvm_target.DataLayout.dispose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194380 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:47:11 +00:00
Peter Zotov
9683888db6 [llvm-c] Remove dead typedef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194379 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:47:01 +00:00
Sylvestre Ledru
68eca1bf8a Update of the 'Code Review' page. The link is now called 'Create Diff' instead of 'Create Revision'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 14:27:56 +00:00
NAKAMURA Takumi
85dfb8d948 [autoconf] Prune "runtime" stuff in configure, corresponding to r191835.
config.status: executing runtime/Makefile commands
  autoconf/install-sh: runtime/Makefile does not exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194376 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 13:53:52 +00:00
Evgeniy Stepanov
4590b8c090 [msan] Propagate origin for insertvalue, extractvalue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 13:37:10 +00:00
Justin Holewinski
40f689851f [NVPTX] Blacklist TailDuplicate pass
This causes issues with virtual registers.  We will likely need
to fix TailDuplicate in the future, or introduce a new version
that plays nicely with vregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194373 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 12:58:14 +00:00
Pete Cooper
38fb3fae34 Don't universally enable initialiser lists on GCC. Thanks for catching this Chandler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194365 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 05:14:42 +00:00
Pete Cooper
43ed63bc83 Add LLVM_HAS_INITIALIZER_LISTS for upcoming C++11 support. Use it in ArrayRef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 03:58:00 +00:00
Tim Northover
65d1be119b AArch64: refactor vector list creation to be more uniform
Instructions taking a vector list (e.g. "ld2 {v0.2d, v1.d2}, [x0]") need a
special register-class to deal with the constraints, and C++ code to support
selection. However, that C++ code can be made reasonably uniform to simplify
the selection process. Hence this patch.

No functionality change, so no tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 03:35:43 +00:00