Commit Graph

74 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
312244747c Remove the RenderMachineFunction HTML output pass.
I don't think anyone has been using this functionality for a while, and
it is getting in the way of refactoring now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20 23:47:58 +00:00
Jakob Stoklund Olesen
d4348a2dc2 Remove LiveIntervalUnions from RegAllocBase.
They are living in LiveRegMatrix now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158868 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20 22:52:29 +00:00
Jakob Stoklund Olesen
812cda9a5c Convert RABasic to using LiveRegMatrix interference checking.
Stop using the LiveIntervalUnions provided by RegAllocBase, they will be
removed soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20 22:52:24 +00:00
Benjamin Kramer
a978366339 Guard private fields that are unused in Release builds with #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158608 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-16 21:48:13 +00:00
Jakob Stoklund Olesen
af06825460 Remove final verification in RABasic.
We now have a proper machine code verifier pass between register
allocation and rewriting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 23:48:48 +00:00
Jakob Stoklund Olesen
fe17bdbb50 Also compute MBB live-in lists in the new rewriter pass.
This deduplicates some code from the optimizing register allocators, and
it means that it is now possible to change the register allocators'
solutions simply by editing the VirtRegMap between the register
allocator pass and the rewriter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-09 00:14:47 +00:00
Jakob Stoklund Olesen
05ec712e7f Reintroduce VirtRegRewriter.
OK, not really. We don't want to reintroduce the old rewriter hacks.

This patch extracts virtual register rewriting as a separate pass that
runs after the register allocator. This is possible now that
CodeGen/Passes.cpp can configure the full optimizing register allocator
pipeline.

The rewriter pass uses register assignments in VirtRegMap to rewrite
virtual registers to physical registers, and it inserts kill flags based
on live intervals.

These finalization steps are the same for the optimizing register
allocators: RABasic, RAGreedy, and PBQP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158244 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08 23:44:45 +00:00
Benjamin Kramer
a7542d5f87 Remove unused private fields found by clang's new -Wunused-private-field.
There are some that I didn't remove this round because they looked like
obvious stubs. There are dead variables in gtest too, they should be
fixed upstream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 18:25:08 +00:00
Jakob Stoklund Olesen
396618b43a Switch all register list clients to the new MC*Iterator interface.
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 23:28:30 +00:00
Jakob Stoklund Olesen
20942dcd86 Allow LiveRangeEdit to be created with a NULL parent.
The dead code elimination with callbacks is still useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19 05:25:46 +00:00
Pete Cooper
789d5d85ba Moved LiveRangeEdit.h so that it can be called from other parts of the backend, not just libCodeGen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 22:44:18 +00:00
Pete Cooper
8a06af9669 Refactored the LiveRangeEdit interface so that MachineFunction, TargetInstrInfo, MachineRegisterInfo, LiveIntervals, and VirtRegMap are all passed into the constructor and stored as members instead of passed in to each method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 22:22:53 +00:00
Craig Topper
e4fd907e72 Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04 10:43:23 +00:00
Lang Hames
1485455be0 Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. These
methods are no longer needed now that LinearScan has gone away.

(Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 22:07:24 +00:00
Andrew Trick
19273aec44 Clear virtual registers after they are no longer referenced.
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21 04:51:23 +00:00
Andrew Trick
8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:36 +00:00
Jakob Stoklund Olesen
a94e635cec Add Register mask support to RABasic.
When a virtual register is live across a call, limit the search space to
call-preserved registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 18:54:35 +00:00
Andrew Trick
42b7a71dc7 Renamed MachineScheduler to ScheduleTopDownLive.
Responding to code review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148290 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:55:03 +00:00
Andrew Trick
c1b1c7b205 Moving options declarations around.
More short term hackery until we have a way to configure passes that work on LiveIntervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148289 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:54:59 +00:00
Andrew Trick
96f678f2d7 Added the MachineSchedulerPass skeleton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148105 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 06:30:30 +00:00
Jakob Stoklund Olesen
9384111e90 Make data structures private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-11 23:19:08 +00:00
Jakob Stoklund Olesen
a8bd9a68f7 Sink spillInterferences into RABasic.
This helper method is too simplistic for RAGreedy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-11 22:52:14 +00:00
Jakob Stoklund Olesen
ccc9581e8b Move RegAllocBase into its own cpp file separate from RABasic.
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147972 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-11 22:28:30 +00:00
Jakob Stoklund Olesen
d9e5c764bf Freeze reserved registers before starting register allocation.
The register allocators don't currently support adding reserved
registers while they are running.  Extend the MRI API to keep track of
the set of reserved registers when register allocation started.

Target hooks like hasFP() and needsStackRealignment() can look at this
set to avoid reserving more registers during register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-05 00:26:49 +00:00
Jakob Stoklund Olesen
98985f959c Privatize an unused part of the LiveIntervalUnion::Query interface.
No clients are iterating over interference overlaps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:00:42 +00:00
Jakob Stoklund Olesen
27215676c7 Refer to the RegisterCoalescer pass by ID.
A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 00:29:53 +00:00
Jakob Stoklund Olesen
3b92527885 Print out the MBB live-in registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 23:12:08 +00:00
Jakob Stoklund Olesen
9d812a2805 Better diagnostics when inline asm fails to allocate.
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 07:17:37 +00:00
Rafael Espindola
5b220213bf There is only one register coalescer. Merge it into the base class and
remove the analysis group.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133899 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26 22:34:10 +00:00
Rafael Espindola
fdf16ca44f Move RegisterCoalescer.h to lib/CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26 21:41:06 +00:00
Jakob Stoklund Olesen
5f2316a3b5 Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
of reserved registers.

Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:34:53 +00:00
Jakob Stoklund Olesen
bdda37d7fb Fix PR9883. Make sure all caches are invalidated when a live range is repaired.
The previous invalidation missed the alias interference caches.

Also add a stats counter for the number of repaired ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 17:37:41 +00:00
Jakob Stoklund Olesen
bf4e10f2f6 Emit a proper error message when register allocators run out of registers.
This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 21:58:30 +00:00
Jakob Stoklund Olesen
6bfba2e5af Prefer cheap registers for busy live ranges.
On the x86-64 and thumb2 targets, some registers are more expensive to encode
than others in the same register class.

Add a CostPerUse field to the TableGen register description, and make it
available from TRI->getCostPerUse. This represents the cost of a REX prefix or a
32-bit instruction encoding required by choosing a high register.

Teach the greedy register allocator to prefer cheap registers for busy live
ranges (as indicated by spill weight).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20 18:19:48 +00:00
Jakob Stoklund Olesen
dfaf0e2c0e Fix a bug in RegAllocBase::addMBBLiveIns() where a basic block could accidentally be skipped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 18:11:28 +00:00
Jakob Stoklund Olesen
560ab9ebf7 Reuse live interval union between functions. This saves a bit of compile time
when compiling many small functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-11 23:57:14 +00:00
Jakob Stoklund Olesen
6d73c7dad1 Use a faster algorithm for computing MBB live-in registers after register allocation.
LiveIntervals::findLiveInMBBs has to do a full binary search for each segment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-11 20:01:41 +00:00
Jakob Stoklund Olesen
bd1926dfd4 Time the initial seeding of live registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-11 15:00:42 +00:00
Jakob Stoklund Olesen
cfafc54040 Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05 21:40:37 +00:00
Jakob Stoklund Olesen
842759662b The basic register allocator must also use the inline spiller.
It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 23:02:17 +00:00
Jakob Stoklund Olesen
0b5015188e Allow the allocation of empty live ranges that have uses.
Empty ranges may represent undef values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 04:32:51 +00:00
Jakob Stoklund Olesen
2926733240 Tag cached interference with a user-provided tag instead of the virtual register number.
The live range of a virtual register may change which invalidates the cached
interference information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-16 22:56:11 +00:00
Jakob Stoklund Olesen
10a433238f Spill multiple registers at once.
Live range splitting can create a number of small live ranges containing only a
single real use. Spill these small live ranges along with the large range they
are connected to with copies. This enables memory operand folding and maximizes
the spill to fill distance.

Work in progress with known bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12 04:17:20 +00:00
Jakob Stoklund Olesen
47dbf6cef7 Change the Spiller interface to take a LiveRangeEdit reference.
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 01:51:42 +00:00
Jakob Stoklund Olesen
38f6bd0fc8 Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 01:21:58 +00:00
Jakob Stoklund Olesen
98d9648de7 Change the RAGreedy register assignment order so large live ranges are allocated first.
This is based on the observation that long live ranges are more difficult to
allocate, so there is a better chance of solving the puzzle by handling the big
pieces first. The allocator will evict and split long alive ranges when they get
in the way.

RABasic is still using spill weights for its priority queue, so the interface to
the queue has been virtualized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22 23:01:52 +00:00
Jakob Stoklund Olesen
ba05c01dab Add VirtRegMap::rewrite() and use it in the new register allocators.
The rewriter works almost identically to -rewriter=trivial, except it also
eliminates any identity copies.

This makes the new register allocators independent of VirtRegRewriter.cpp which
will be going away at the same time as RegAllocLinearScan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18 22:03:18 +00:00
Jakob Stoklund Olesen
febb0bd0b9 Trim debugging output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125802 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18 00:32:47 +00:00
Jakob Stoklund Olesen
0db841f9c2 Add basic register allocator statistics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-17 22:53:48 +00:00
Jakob Stoklund Olesen
2710638db2 Evict a lighter single interference before attempting to split a live range.
Registers are not allocated strictly in spill weight order when live range
splitting and spilling has created new shorter intervals with higher spill
weights.

When one of the new heavy intervals conflicts with a single lighter interval,
simply evict the old interval instead of trying to split the heavy one.

The lighter interval is a better candidate for splitting, it has a smaller use
density.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-09 01:14:03 +00:00