60076 Commits

Author SHA1 Message Date
Vincent Lejeune
64ca84d9b2 R600: CONST_ADDRESS node is not marked as mayLoad anymore
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

mayLoad complexify scheduling and does not bring any usefull info
as the location is not writeable at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176486 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:42 +00:00
Vincent Lejeune
f49cf1c320 R600: Use MUL_IEEE for trig/fdiv intrinsic
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176485 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:37 +00:00
Vincent Lejeune
3f7f8e814e R600: Add support for indirect addressing of non default const buffer
NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176484 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:29 +00:00
Bill Wendling
69d37fa635 Remove unused #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176467 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 01:00:45 +00:00
David Sehr
6c4265a541 The current X86 NOP padding uses one long NOP followed by the remainder in
one-byte NOPs.  If the processor actually executes those NOPs, as it sometimes
does with aligned bundling, this can have a performance impact.  From my
micro-benchmarks run on my one machine, a 15-byte NOP followed by twelve
one-byte NOPs is about 20% worse than a 15 followed by a 12.  This patch
changes NOP emission to emit as many 15-byte (the maximum) as possible followed
by at most one shorter NOP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176464 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 00:02:23 +00:00
Lang Hames
880e8c0ad4 Check isDiscardableIfUnused, rather than hasLocalLinkage, when bumping
GlobalValue linkage up to ExternalLinkage in the ExtractGV pass. This
prevents linkonce and linkonce_odr symbols from being DCE'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176459 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 22:40:44 +00:00
Akira Hatanaka
1ae08e0077 [mips] Print move instructions.
"move $4, $5" is printed instead of "or $4, $5, $zero".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 22:25:01 +00:00
Jack Carter
0b9675d631 Mips specific inline assembler constraint 'R'
'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176452 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 21:33:15 +00:00
Preston Gurd
9a2cfffdb6 Bypass Slow Divides
* Only apply divide bypass optimization when not optimizing for size. 
* Fixed bug caused by constant for 0 value of type Int32,
  used dividend type to generate the constant instead.
* For atom x86-64 apply the divide bypass to use 16-bit divides instead of
  64-bit divides when operand values are small enough.
* Added lit tests for 64-bit divide bypass.

Patch by Tyler Nowicki!




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 18:13:57 +00:00
Tom Stellard
ff4faabd2d R600: Clean up datalayout strings so they better match hardware capabilities
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176439 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 17:40:28 +00:00
Jia Liu
b3ea880a70 Mips ISD typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176426 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 01:06:54 +00:00
Jim Grosbach
7bf504c58f ARM: Creating a vector from a lane of another.
The VDUP instruction source register doesn't allow a non-constant lane
index, so make sure we don't construct a ARM::VDUPLANE node asking it to
do so.

rdar://13328063
http://llvm.org/bugs/show_bug.cgi?id=13963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 20:16:24 +00:00
Jim Grosbach
65da9f1ce1 Clean up code format a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 20:16:19 +00:00
Jim Grosbach
7ccf46395e Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176411 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 20:16:15 +00:00
Arnold Schwaighofer
21c0aa74bd ARM NEON: Fix v2f32 float intrinsics
Mark them as expand, they are not legal as our backend does not match them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 19:38:33 +00:00
Nuno Lopes
b443a0aeac recommit r172363 & r171325 (reverted in r172756)
This adds minimalistic support for PHI nodes to llvm.objectsize() evaluation

fingers crossed so that it does break clang boostrap again..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176408 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 11:36:24 +00:00
Nuno Lopes
2bc689c846 add getUnderlyingObjectSize()
this is similar to getObjectSize(), but doesnt subtract the offset
tweak the BasicAA code accordingly (per PR14988)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 11:23:34 +00:00
Arnold Schwaighofer
5f0d9dbdf4 X86 cost model: Adjust cost for custom lowered vector multiplies
This matters for example in following matrix multiply:

int **mmult(int rows, int cols, int **m1, int **m2, int **m3) {
  int i, j, k, val;
  for (i=0; i<rows; i++) {
    for (j=0; j<cols; j++) {
      val = 0;
      for (k=0; k<cols; k++) {
        val += m1[i][k] * m2[k][j];
      }
      m3[i][j] = val;
    }
  }
  return(m3);
}

Taken from the test-suite benchmark Shootout.

We estimate the cost of the multiply to be 2 while we generate 9 instructions
for it and end up being quite a bit slower than the scalar version (48% on my
machine).

Also, properly differentiate between avx1 and avx2. On avx-1 we still split the
vector into 2 128bits and handle the subvector muls like above with 9
instructions.
Only on avx-2 will we have a cost of 9 for v4i64.

I changed the test case in test/Transforms/LoopVectorize/X86/avx1.ll to use an
add instead of a mul because with a mul we now no longer vectorize. I did
verify that the mul would be indeed more expensive when vectorized with 3
kernels:

for (i ...)
   r += a[i] * 3;
for (i ...)
  m1[i] = m1[i] * 3; // This matches the test case in avx1.ll
and a matrix multiply.

In each case the vectorized version was considerably slower.

radar://13304919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 04:02:52 +00:00
Andrew Trick
1c01af8f26 Added FIXME for future Hexagon cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 01:43:08 +00:00
Nadav Rotem
5290baacb8 PR14448 - prevent the loop vectorizer from vectorizing the same loop twice.
The LoopVectorizer often runs multiple times on the same function due to inlining.
When this happens the loop vectorizer often vectorizes the same loops multiple times, increasing code size and adding unneeded branches.
With this patch, the vectorizer during vectorization puts metadata on scalar loops and marks them as 'already vectorized' so that it knows to ignore them when it sees them a second time.

PR14448.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 01:33:49 +00:00
Peter Collingbourne
328d1b6500 Modify {Call,Invoke}Inst::addAttribute to take an AttrKind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 01:20:18 +00:00
Eli Bendersky
b804a1b178 Remove duplicate line and move another closer to its actual use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 23:32:40 +00:00
Argyrios Kyrtzidis
3b05d9f4db In llvm::MemoryBuffer::getFile() remove an unnecessary stat call check.
The sys::fs::is_directory() check is unnecessary because, if the filename is
a directory, the function will fail anyway with the same error code returned.
Remove the check to avoid an unnecessary stat call.

Someone needs to review on windows and see if the check is necessary there or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 22:48:51 +00:00
Akira Hatanaka
ee767fe2d2 [mips] Fix inefficient code generation.
This patch eliminates the need to emit a constant move instruction when this
pattern is matched:

(select (setgt a, Constant), T, F)

The pattern above effectively turns into this:

(conditional-move (setlt a, Constant + 1), F, T)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176384 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:52:08 +00:00
Jean-Luc Duprat
c2171eb3ff Removed extraneous #include "LLVMContextImpl.h" from lib/IR/Module.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176382 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:37:24 +00:00
Akira Hatanaka
079a0ff196 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176380 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:22:21 +00:00
Akira Hatanaka
c3c3810f51 Set properties for f128 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:11:44 +00:00
Chad Rosier
7590022f40 Generate an error message instead of asserting or segfaulting when we can't
handle indirect register inputs.
rdar://13322011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:12:05 +00:00
Benjamin Kramer
5d79bb8770 LoopVectorize: Don't hang forever if a PHI only has skipped PHI uses.
Fixes PR15384.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:07:31 +00:00
Michael Ilseman
4c8e74f0b7 Cache the result of Function::getIntrinsicID() in a DenseMap attached to the LLVMContext.
This reduces the time actually spent doing string to ID conversion and shows a 10% improvement in compile time for a particularly bad case that involves ARM Neon intrinsics (these have many overloads).

Patch by Jean-Luc Duprat!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176365 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 18:48:54 +00:00
Michael Liao
a6b20ced76 Fix PR10475
- ISD::SHL/SRL/SRA must have either both scalar or both vector operands
  but TLI.getShiftAmountTy() so far only return scalar type. As a
  result, backend logic assuming that breaks.
- Rename the original TLI.getShiftAmountTy() to
  TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to
  return target-specificed scalar type or the same vector type as the
  1st operand.
- Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar
  type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176364 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 18:40:30 +00:00
Chad Rosier
b8f307b2d6 Add support for using non-pic code for arm and thumb1 when emitting the sjlj
dispatch code.  As far as I can tell the thumb2 code is behaving as expected.
I was able to compile and run the associated test case for both arm and thumb1.
rdar://13066352


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 18:30:38 +00:00
Jyotsna Verma
ef94c6c85e Hexagon: Add constant extender support framework.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 17:37:13 +00:00
Christian Konig
66501123d1 R600/SI: handle all registers in copyPhysReg v2
v2: based on Michels patch, but now allows copying of all registers sizes.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176346 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 09:46:27 +00:00
Christian Konig
0916ac2100 R600/SI: remove S_MOV immediate patterns
They won't match anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176345 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 09:46:22 +00:00
Christian Konig
f4632b58c7 R600/SI: remove GPR*AlignEncode
It's much easier to specify the encoding with tablegen directly.

Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 09:46:17 +00:00
Christian Konig
777962fddf R600/SI: fix warning about overloaded virtual
Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 09:46:11 +00:00
Christian Konig
9ff8dc8ecd R600/SI: fix inserting waits for unordered defines
Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176342 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 09:46:04 +00:00
Duncan Sands
4d9b7c234f GCC thinks that this variable might be used uninitialized (it isn't).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176341 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 09:46:03 +00:00
Akira Hatanaka
aa49f35240 [mips] Remove unused option. Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 02:17:02 +00:00
Akira Hatanaka
1f0aca857b [mips] Add the capability to search delay slot filling instructions in
successor basic blocks.

Currently this is off by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 02:03:51 +00:00
Akira Hatanaka
888e8fefd2 [mips] Do not add SecondLastInst to list BranchInstrs if there is only one
terminator.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176326 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 01:22:26 +00:00
Akira Hatanaka
d0a4b60df1 [mips] Define an overloaded version of function MipsInstrInfo::AnalyzeBranchAdd.
This function will be used later when the capability to search delay slot
filling instructions in successor blocks is added. No intended functionality
changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176325 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 01:10:17 +00:00
Akira Hatanaka
b8bc8cc3b0 [mips] Add options to disable searching backward and in successor blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176321 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 01:02:36 +00:00
Akira Hatanaka
e760675b0e [mips] Add capability to search in the forward direction for instructions that
can fill the delay slot.

Currently, this is off by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:50:52 +00:00
Akira Hatanaka
1f7330b162 [mips] Define helper function searchRange
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176318 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:26:14 +00:00
Akira Hatanaka
49d58723d2 [mips] Rename function findDelayInstr to searchBackward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176317 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:20:16 +00:00
Andrew Trick
838038d3e1 Scheduler diagnostics. Print the register name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:19:14 +00:00
Andrew Trick
bf32b7f844 Instructions schedulers should report correct height/depth.
We avoided computing DAG height/depth during Node printing because it
shouldn't depend on an otherwise valid DAG. But this has become far
too annoying for the common case of a valid DAG where we want to see
valid values. If doing the computation on-the-fly turns out to be a
problem in practice, then I'll add a mode to the diagnostics to only
force it when we're likely to have a valid DAG, otherwise explicitly
print INVALID instead of bogus numbers. For now, just go for it all
the time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:19:09 +00:00
Akira Hatanaka
a56f411961 [mips] Define class MemDefsUses.
This class tracks dependence between memory instructions using underlying
objects of memory operands. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176313 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:16:31 +00:00