6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-07 16:54:48 +00:00
Code Issues Projects Releases Wiki Activity
57,719 Commits 39 Branches 0 Tags 277 MiB
e3d97c7447
Commit Graph

13839 Commits

Author SHA1 Message Date
Bob Wilson
69bfbd61c6 Remove the NEON N2VSInt instruction class: it's only used in one place and 
since it has no pattern, there's not much point in distinguishing an "N2VS"
class for intrinsics anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96525 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 22:42:54 +00:00
Johnny Chen
b943627915 Added CLREX (Clear-Exclusive) for disassembly only. 
A8.6.30


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 22:37:58 +00:00
Bob Wilson
3c0f96e054 More cleanup for NEON: 
* Use "S" abbreviation for scalar single FP registers in class and pattern
names, instead of keeping the "D" (for "double") abbreviation and tacking on
an "s" elsewhere in the name.
* Move the scalar single FP register classes and patterns to be more
consistent with other definitions in the file.
* Rename "VNEGf32d" definition to "VNEGfd" for consistency.
* Deleted the N2VDIntsPat pattern; N2VSPat is good enough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 22:23:11 +00:00
Johnny Chen
fb566795c6 Added RFE for disassembly only. 
B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the
specified address and the following word respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 21:39:10 +00:00
Jakob Stoklund Olesen
de12e4351c Remember to define super registers in mips calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96504 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 20:18:50 +00:00
Chris Lattner
f3047cdbd4 "Fix and issue in SparcAsmPrinter where multiple identical .LLGETPCHn symbols could be emitted in the same file (it was uniqued by block number, but not by function number). " Patch by Nathan Keynes! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 18:57:19 +00:00
Chris Lattner
0a3f39985b move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter, 
and add a sparc implementation that knows about delay slots.  Patch by
Nathan Keynes!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 18:52:56 +00:00
Chris Lattner
7180f10fc7 add a note, from PR5100 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96490 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 18:42:24 +00:00
Sanjiv Gupta
94c3ddbcc6 Added routine to clone the body of a function and maintain a map of already 
cloned functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 18:11:29 +00:00
Sanjiv Gupta
139eda6054 Added a function to clone locals of a function.( which for pic16 are globals 
with mangled names).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96465 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 06:48:50 +00:00
Sanjiv Gupta
11979aa23e Removed header files from .h by adding forward decls. 
Renamed PIC16FrameOverlay namespace to PIC16OVERLAY.
Renamed PIC16FrameOverlay class to PIC16Overlay.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96463 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 06:46:23 +00:00
Johnny Chen
b2503c096f Added BFI for disassembly only. 
A8.6.18  BFI - Bitfield insert (Encoding A1)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 06:31:48 +00:00
Chris Lattner
64b4986c94 rename and document some arguments so I don't have to keep 
reverse engineering what they are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 06:07:47 +00:00
Anton Korobeynikov
4e9c6dfb8b Use pointer-wide encoding for LSDA and FDE on Darwin. 
Hopefully, this will fix the remaining issues seen there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 05:53:11 +00:00
Chris Lattner
52be68d86c daniel remembered why this was needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96440 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 01:55:54 +00:00
Chris Lattner
feeb93ecd2 add a comment explaining why darwin/i386 uses ## as a comment. 
It's not clear why this is really required, but it was explicitly
added in r48808 with no real explanation or rdar #.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 01:38:01 +00:00
Sanjiv Gupta
e74c3bae3a Initial implementation of PIC16 Cloner pass. 
This pass is supposed to be run on the linked .bc module.
It traveses the module call graph twice. Once starting from the main function
and marking each reached function as "ML". Again, starting from the ISR
and cloning any reachable function that was marked as "ML". After cloning
the function, it remaps all the call sites in IL functions to call the
cloned functions. 

Currently only marking is being done.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 01:11:53 +00:00
Dan Gohman
36b01cb885 Make the operand and format specifier match, and print all 
64 bits, fixing a variety of problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 00:37:20 +00:00
Bob Wilson
9abe19d0b9 Wrap lines to 80 columns and generally try to clean up whitespace and 
indentation.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96418 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-17 00:31:29 +00:00
Bill Wendling
b76beda30a Make error statement more personal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 22:47:14 +00:00
Chris Lattner
92d3ada814 fix rdar://7653908, a crash on a case where we would fold a load 
into a roundss intrinsic, producing a cyclic dag.  The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection.  Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96408 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 22:35:06 +00:00
Bob Wilson
0eb0c7401c Handle tGPR register class in a few more places. This fixes some llvm-gcc 
build failures due to my fix for pr6111.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 22:01:59 +00:00
Johnny Chen
0296f3e504 Add SMC (Secure Monitor Call) system instruction for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96401 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 21:59:54 +00:00
Dale Johannesen
5994fd0f4d Really reserve R2 on PPC Darwin. PR 6314. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96399 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 21:53:27 +00:00
Jim Grosbach
80dc116ce3 80 column cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96393 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 21:23:02 +00:00
Evan Cheng
ae3ecf9603 Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)). 
If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).

Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96389 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 21:09:44 +00:00
Jim Grosbach
6417171026 Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96388 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 21:07:46 +00:00
David Greene
8939b0d8a9 Add support for emitting non-temporal stores for DAGs marked 
non-temporal.  Fix from r96241 for botched encoding of MOVNTDQ.

Add documentation for !nontemporal metadata.

Add a simpler movnt testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 20:50:18 +00:00
Jim Grosbach
39be8fcfdc Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but 
to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 20:42:29 +00:00
Jim Grosbach
cd862b19b8 Remove redundant setting of Defs. CPSR is already marked by the block level set of Defs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 20:35:59 +00:00
Jim Grosbach
0a145f3d90 First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates. 
They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.

This patch handles ARM mode. Thumb2 will follow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96381 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 20:17:57 +00:00
Johnny Chen
64dfb7835d Added for disassembly the following instructions: 
o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 20:04:27 +00:00
Bob Wilson
1665b0a224 Fix pr6111: Avoid using the LR register for the target address of an indirect 
branch in ARM v4 code, since it gets clobbered by the return address before
it is used.  Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 17:24:15 +00:00
Duncan Sands
47c5188789 Introduce isOpaqueTy and use it rather than isa<OpaqueType>. Also, move some 
methods to try to have the type predicates be more logically positioned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96349 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 14:50:09 +00:00
Duncan Sands
1df9859c40 There are two ways of checking for a given type, for example isa<PointerType>(T) 
and T->isPointerTy().  Convert most instances of the first form to the second form.
Requested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96344 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 11:11:14 +00:00
Benjamin Kramer
30fb00aac0 Minor warning fixes (semicolons, newline at EOF). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96343 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 10:25:04 +00:00
Chris Lattner
ccba15f914 mark all the generated node predicates 'const'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96337 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 07:26:36 +00:00
Chris Lattner
a08b587494 make pcrel immediate values relative to the start of the field, 
not the end of the field, fixing rdar://7651978


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96330 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 05:03:17 +00:00
Sanjiv Gupta
7643ca5c2b The code section for an ISR has a specific address. 
Currently, whether a function is ISR or not is encoded in the section attribute for that function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96322 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 03:41:07 +00:00
Rafael Espindola
a3b1119977 Drop support for the InReg attribute on the ppc backend. This was used by 
llvm-gcc but has been replaced with pad argument which don't need any
special backend support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96312 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-16 01:50:18 +00:00
Bob Wilson
7dc9747e89 Put repeated empty pattern into the AQI instruction class. 
We could almost use a multiclass for the signed/unsigned instructions, but
there are only 6 of them so I guess it's not worth it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96297 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 23:43:47 +00:00
Anton Korobeynikov
46885ded4e Fix a silly darwin-only typo introduced during merge. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96289 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 22:38:10 +00:00
Anton Korobeynikov
362dd0bef5 Move TLOF implementations to libCodegen to resolve layering violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 22:37:53 +00:00
Anton Korobeynikov
990a9fde39 Add suffix for stubs, so we won't have name clashes with private symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 22:36:26 +00:00
Anton Korobeynikov
9184b25fa5 Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 22:35:59 +00:00
Chris Lattner
cd10d14b4c revert r96241. It breaks two regression tests, isn't documented, 
and the testcase needs improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96265 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 20:53:01 +00:00
Evan Cheng
014bf215c3 Split SelectionDAGISel::IsLegalAndProfitableToFold to 
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 19:41:07 +00:00
David Greene
786da7dec2 Add support for emitting non-temporal stores for DAGs marked 
non-temporal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 17:02:56 +00:00
David Greene
db8d989ed5 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96239 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:57:43 +00:00
David Greene
7720155bec Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96238 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:57:13 +00:00
David Greene
54a7aa8429 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96237 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:57:02 +00:00
David Greene
534502d1e9 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96236 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:56:53 +00:00
David Greene
74a6a7990c Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96235 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:56:34 +00:00
David Greene
4d58b64125 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96234 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:56:22 +00:00
David Greene
f6fa186cf9 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:56:10 +00:00
David Greene
73657df388 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96232 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:55:58 +00:00
David Greene
f749efae8b Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96231 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:55:37 +00:00
David Greene
1b58cab38c Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96230 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:55:24 +00:00
David Greene
0e2236c70c Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:55:07 +00:00
David Greene
67c9d42f93 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:53:33 +00:00
David Greene
140a5d6413 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:49:52 +00:00
Duncan Sands
b0bc6c361d Uniformize the names of type predicates: rather than having isFloatTy and 
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96223 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 16:12:20 +00:00
Andrew Lenharth
6ceeba6043 Fix changes from r75027 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96220 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 15:00:44 +00:00
Chris Lattner
020bb08026 no need to add the instruction count anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96212 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-15 06:38:41 +00:00
Chris Lattner
eb079a3491 mark "addr" as having type "iPTR", eliminating some type comparisons 
in hte generated dag isel fil.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-14 21:53:19 +00:00
Sanjiv Gupta
44de6823fc fixes to pagesel/banksel inserter. 
1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96175 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-14 18:27:42 +00:00
Anton Korobeynikov
77709ac7db Forgot to commit the header 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96174 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-14 18:25:41 +00:00
Anton Korobeynikov
245ba9698e Drop winmcasminfo and use normal AT&T COFF for all windows targets. 
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96165 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-14 15:19:54 +00:00
Johnny Chen
2faf3919d4 Try to factorize the specification of saturating add/subtract operations a bit, 
as suggested by Bob Wilson.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-14 06:32:20 +00:00
Chris Lattner
1cea10a663 teach the encoder to handle pseudo instructions like FP_REG_KILL, 
encoding them into nothing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96110 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 19:16:53 +00:00
Daniel Dunbar
a8dfb79e6f X86: Move extended MCFixupKinds into X86FixupKinds.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96088 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 09:27:52 +00:00
Chris Lattner
b779033a23 add encoder support and tests for rdtscp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 03:42:24 +00:00
Johnny Chen
a1e7621510 Add SETEND and BXJ instructions for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96075 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 02:51:09 +00:00
Sean Callanan
cebe955779 Added the rdtscp instruction to the x86 instruction 
tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 02:06:11 +00:00
Evan Cheng
7545f49a5e Teach MachineFrameInfo to track maximum alignment while stack objects are being 
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 01:56:41 +00:00
Sean Callanan
95a5a7d570 Fixed encodings for invlpg, invept, and invvpid. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96065 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 01:48:34 +00:00
Johnny Chen
08b85f371e Added a bunch of saturating add/subtract instructions for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 01:21:01 +00:00
Chris Lattner
f068304b1f rip out the 'heinous' x86 MCCodeEmitter implementation. 
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 00:49:29 +00:00
Chris Lattner
a599de2410 remove special cases for vmlaunch, vmresume, vmxoff, and swapgs 
fix swapgs to be spelled right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 00:41:14 +00:00
Daniel Dunbar
9c60f534cb MC/X86: Push immediate operands as immediates not expressions when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-13 00:17:21 +00:00
Chris Lattner
eaca5fa8e6 Remove special cases for [LM]FENCE, MONITOR and MWAIT from 
encoder and decoder by using new MRM_ forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96048 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 23:54:57 +00:00
Chris Lattner
4a2e5edb94 implement the rest of correct x86-64 encoder support for 
rip-relative addresses, and add a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 23:24:09 +00:00
Dale Johannesen
15ce1d71f1 Add the problem I just hacked around in 96015/96020. 
The solution there produces correct code, but is seriously
deficient in several ways.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96039 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 23:16:24 +00:00
Chris Lattner
86020e4628 give MCCodeEmitters access to the current MCContext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96038 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 23:12:47 +00:00
Chris Lattner
835acabce1 implement infrastructure to support fixups for rip-rel 
addressing.  This isn't complete because I need an MCContext
to generate new MCExprs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96036 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 23:00:36 +00:00
Johnny Chen
f4d81051ff Add YIELD, WFE, WFI, and SEV instructions for disassembly only. 
Plus add two formats: MiscFrm and ThumbMiscFrm.  Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96032 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:53:19 +00:00
Chris Lattner
1e35d0e923 pull the rip-relative addressing mode case up early. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96031 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:47:55 +00:00
Chris Lattner
9cc48eb897 fixme resolved! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:39:06 +00:00
Chris Lattner
cf65339b52 start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96028 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:36:47 +00:00
Chris Lattner
a0331199fc enhance the immediate field encoding to know whether the immediate 
is pc relative or not, mark call and branches as pcrel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96026 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:27:07 +00:00
Evan Cheng
3f7aa79c2a Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96023 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:17:21 +00:00
Dale Johannesen
ee25bc2942 This should have gone in with 26015, see comments there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96020 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:00:40 +00:00
Johnny Chen
83498e55e2 Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96019 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 21:59:23 +00:00
Dale Johannesen
c12da8d30a When save/restoring CR at prolog/epilog, in a large 
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 21:35:34 +00:00
Chris Lattner
fdfeb6976f Add support for a union type in LLVM IR. Patch by Talin! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96011 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:49:41 +00:00
Johnny Chen
b3e1bf54b2 Add SWP (Swap) and SWPB (Swap Byte) for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96010 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:48:24 +00:00
Johnny Chen
b98e160318 Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95999 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 18:55:33 +00:00
Anton Korobeynikov
ebb0c2b287 Setup correct data layout to match gcc's expectations on mingw32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 15:28:56 +00:00
Anton Korobeynikov
4dd162f394 Cleanup stdcall / fastcall name mangling. 
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95980 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 15:28:40 +00:00
Chris Lattner
0d8db8e0a8 add a bunch of mod/rm encoding types for fixed mod/rm bytes. 
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 02:06:33 +00:00