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Author SHA1 Message Date
Devang Patel
4771e16fa9 Keep track of metadata used by other metadata. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:51:10 +00:00
Chris Lattner
5e44e472d6 use TLOF to compute the section for a function instead of 
replicating the logic manually.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78011 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:32:50 +00:00
Dan Gohman
5544c6cad8 Minor whitespace fix, so this doesn't look like a unary *. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78010 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:30:18 +00:00
Dan Gohman
8bb9c92892 Add -disable-output. Thanks Bill! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:24:22 +00:00
Chris Lattner
f61159b574 convert macho stub emission to use SwitchToSection instead of 
textual sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78007 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:18:15 +00:00
Chris Lattner
865aaf00ad hoist some common code out of a switch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78006 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:16:57 +00:00
Dan Gohman
43ee5f7c08 Add a new Constant::getIntegerValue helper function, and convert a 
few places in InstCombine to use it, to fix problems handling pointer
types. This fixes the recent llvm-gcc bootstrap error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78005 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 22:07:33 +00:00
Chris Lattner
c8bfb7a49d this really shouldn't switch sections without telling the asmprinter, but 
hey it uses .previous, so it should work :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78004 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 21:57:00 +00:00
David Greene
b525766479 Re-apply LiveInterval index dumping patch, with fixes suggested by Bill 
and others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78003 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 21:55:09 +00:00
Chris Lattner
11e9657eeb Eliminate textual section switching from the x86 backend, one 
more step towards "semantics sections"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78002 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 21:53:27 +00:00
Bob Wilson
a6d658620f Lower CONCAT_VECTOR during legalization instead of matching it during isel. 
Add a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 20:36:38 +00:00
Jakob Stoklund Olesen
980daea857 Fix Bug 4657: register scavenger asserts with subreg lowering 
When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG
instriction because it is an identity copy, make sure that the same registers
are alive before and after the elimination.

When the super-register is marked <undef> this requires inserting an
IMPLICIT_DEF instruction to make sure the super register is live.

Fix a related bug where a kill flag on the inserted sub-register was not transferred properly.

Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77989 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 20:08:18 +00:00
Jakob Stoklund Olesen
ea1c9b7bac Minor stylistic cleanups in the Blackfin target. 
Thanks Chris.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77987 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 19:32:30 +00:00
Eli Friedman
cdc0654b3e Make SimplifyDemandedUseBits generate vector constants where 
appropriate.  Patch per report on llvmdev.  No testcase because the 
original report didn't come with a testcase, and I can't come up with a case
that actually fails.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 19:15:42 +00:00
Chris Lattner
38c398808c make getObjFileLowering() return a non-const reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77984 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 19:12:26 +00:00
Chris Lattner
9a7a4d2a60 remove a dead switch directive, replace it with some 
code that I will be using shortly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77983 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 19:10:44 +00:00
Bob Wilson
6e7a85c075 Revert 77974. It breaks 3 of the ARM tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77982 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 19:06:29 +00:00
Evan Cheng
d2aee8ce89 Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 18:07:19 +00:00
Chris Lattner
1763766a57 eliminate textual section switching from intel asm printer. 
This will cause it to enter the ".text" section instead of "_text"
but masm is already broken.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77977 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 18:06:07 +00:00
Chris Lattner
d54a6b8c58 make SwitchToSection accept null sections for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 18:04:42 +00:00
Daniel Dunbar
d1a919e139 Change C, CBE, MSIL to not provide target data via getTargetData(). 
- The theory is these should never actually be called, since these boil down to
   passes which can access the target data via the standard mechanism.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 17:40:25 +00:00
Sanjiv Gupta
2caf1b212e Allow targets to custom handle softening of results or operands before trying the standard stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77974 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 17:35:21 +00:00
Daniel Dunbar
4e02eb0f67 Provide target data from the module if the target machine doesn't have any. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 17:34:19 +00:00
Benjamin Kramer
d5fe92efbc llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77971 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 13:33:33 +00:00
Anton Korobeynikov
0144280cfb Unbreak win64 compilation callback. 
Since we're generating stubs by hands we don't follow the ABI and don't
create a register spill area.
Don't use this area in compilation callback!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:43:36 +00:00
Evan Cheng
eed0ff147c Fix a coaelescer bug. If a copy val# is extended to eliminate a non-trivially coalesced copy, and the copy kills its source register. Trim the source register's live range to the last use if possible. This fixes up kill marker to make the scavenger happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77967 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:41:59 +00:00
Anton Korobeynikov
dd93f5eb71 Create proper frame index for FP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77966 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:14:30 +00:00
Anton Korobeynikov
6dde14bc25 Perform bitconvert to proper type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77965 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:14:14 +00:00
Anton Korobeynikov
4ab15535e7 Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77964 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:13:56 +00:00
Anton Korobeynikov
80cb8aa862 Cleanup Darwin MMX calling conv stuff - make the stuff more generic. This also fixes a subtle bug, when 6th v1i64 argument passed wrongly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77963 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:13:24 +00:00
Anton Korobeynikov
cf6b739d3d Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 08:12:53 +00:00
Nick Lewycky
3e4c41a84a Remove the GCC path from libLTO. This has been superceded by setAssemblerPath. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77960 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 07:16:42 +00:00
Devang Patel
a82f8838c6 Add NamedMDNode destructor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77959 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 06:19:01 +00:00
Rafael Espindola
8d632c1e98 Use movd instead of movq 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77956 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 05:21:05 +00:00
Daniel Dunbar
05084716c1 Add FileUpdate tool, conditionally updates its output based on its input. 
- Gratuitous and unused, but possibly useful one day.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 05:12:16 +00:00
Daniel Dunbar
defc85327a Fix a race condition in getting the process exit code on Win32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77953 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 05:02:46 +00:00
Daniel Dunbar
4bd03abe59 Remove now unused arguments from TargetRegistry::lookupTarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 04:20:57 +00:00
Evan Cheng
9072c8198d These are done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77949 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 04:08:36 +00:00
Daniel Dunbar
3c2d4bf97f Pass target triple string in to TargetMachine constructor. 
This is not just a matter of passing in the target triple from the module;
currently backends are making decisions based on the build and host
architecture. The goal is to migrate to making these decisions based off of the
triple (in conjunction with the feature string). Thus most clients pass in the
target triple, or the host triple if that is empty.

This has one important change in the way behavior of the JIT and llc.

For the JIT, it was previously selecting the Target based on the host
(naturally), but it was setting the target machine features based on the triple
from the module. Now it is setting the target machine features based on the
triple of the host.

For LLC, -march was previously only used to select the target, the target
machine features were initialized from the module's triple (which may have been
empty). Now the target triple is taken from the module, or the host's triple is
used if that is empty. Then the triple is adjusted to match -march.

The take away is that -march for llc is now used in conjunction with the host
triple to initialize the subtarget. If users want more deterministic behavior
from llc, they should use -mtriple, or set the triple in the input module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 04:03:51 +00:00
Rafael Espindola
0c794b8725 Fix the instruction encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77944 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 03:27:05 +00:00
Rafael Espindola
cc2b67af91 Remove a bitcast that was a no-op. 
Thanks to Eli Friedman for noticing it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77942 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 03:00:05 +00:00
Rafael Espindola
def390a30a Use movq to move 64 bits in and out of mmx registers. 
Fixes PR4669



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 02:45:34 +00:00
Evan Cheng
a8e8984ee4 Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77939 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 02:38:06 +00:00
Eli Friedman
e2c7408199 Remove -disable-mips-abicall and -enable-mips-absolute-call command-line 
options, which don't appear to be useful.  -enable-mips-absolute-call is
completely unused (and unless I'm mistaken, is supposed to have the 
same effect that -relocation-model=dynamic-no-pic should have), 
and -disable-mips-abicall appears to be effectively a 
synonym for -relocation-model=static. Adjust the few users of hasABICall
to checks which seem more appropriate.  Update MipsSubtarget, 
MipsTargetMachine, and MipselTargetMachine to synchronize with recent 
changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77938 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 02:22:28 +00:00
Andreas Bolka
5eca4525f4 Restrict LDA to affine subscripts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77932 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 01:03:48 +00:00
Daniel Dunbar
275872e799 Fix some comments referring to std::cerr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77931 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 01:02:24 +00:00
Bill Wendling
0ea8bf3590 - s/DOUT/DEBUG(errs()/g 
- Tidy up some headers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77929 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-03 00:11:34 +00:00
Daniel Dunbar
e28039cfd1 Move most targets TargetMachine constructor to only taking a target triple. 
- The C, C++, MSIL, and Mips backends still need the module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-02 23:37:13 +00:00
Andreas Bolka
c20a6fd8ce Expand LDA testcases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77926 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-02 23:28:14 +00:00
Richard Osborne
d558ea5e0a Add extra SEXT pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77920 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-02 22:45:24 +00:00