Chris Lattner
e6bb649ec6
actually add the file...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 19:39:38 +00:00
Chris Lattner
b0db161f5b
Start of a pass for recognizing memset and memcpy idioms.
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No functionality yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122562 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 19:32:44 +00:00
Benjamin Kramer
3fed0d917d
Simplify code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122561 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 15:23:45 +00:00
Chris Lattner
6dbb5dc5eb
fix some sort of weird pasto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 12:05:11 +00:00
Chris Lattner
8a4893e013
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 03:53:31 +00:00
Chris Lattner
7ab3cc32d6
Generalize a previous change, fixing PR8855 - an valid large immediate
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rejected by the mc assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 21:36:35 +00:00
Chris Lattner
ae47be1ea0
don't lose TD info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 20:52:04 +00:00
Chris Lattner
7569d79de1
switch the inliner alignment enforcement stuff to use the
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getOrEnforceKnownAlignment function, which simplifies the code
and makes it stronger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 20:42:38 +00:00
Chris Lattner
687140c818
Move getOrEnforceKnownAlignment out of instcombine into Transforms/Utils.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122554 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 20:37:57 +00:00
Michael J. Spencer
43ee29d418
Support/PathV1: Deprecate makeAbsolute and remove Unix impl because it annoys people.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122553 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 20:10:11 +00:00
Benjamin Kramer
49c7e3e290
Fix a thinko pointed out by Frits van Bommel: looking through global variables in isBytewiseValue is not safe.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122550 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 22:23:59 +00:00
Rafael Espindola
fea753b397
Merge IsFixupFullyResolved and IsSymbolRefDifferenceFullyResolved. We now
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have a single point where targets test if a relocation is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 21:22:02 +00:00
Benjamin Kramer
a112087e42
MemCpyOpt: Turn memcpys from a constant into a memset if possible.
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This allows us to compile "int cst[] = {-1, -1, -1};" into
movl $-1, 16(%rsp)
movq $-1, 8(%rsp)
instead of
movl _cst+8(%rip), %eax
movl %eax, 16(%rsp)
movq _cst(%rip), %rax
movq %rax, 8(%rsp)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 21:17:12 +00:00
Daniel Dunbar
4010dd72b8
MC/Mach-O/ARM: Start handling some Thumb branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 16:41:46 +00:00
Andrew Trick
a75ce9f5d2
Minor cleanup related to my latest scheduler changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122545 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 07:10:19 +00:00
Andrew Trick
24312230ad
Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122544 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 06:46:50 +00:00
Andrew Trick
2da8bc8a5f
Various bits of framework needed for precise machine-level selection
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DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
Andrew Trick
6e8f4c4048
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 04:28:06 +00:00
Cameron Zwarich
ef485d8658
Simplify a check for implicit defs and remove a FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122537 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 03:09:36 +00:00
Kevin Enderby
d82ed5b734
In llvm-mc parse a Hash token as a full line comment. Allows handling of
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preprocessed .s files and matches darwin gas. rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 00:12:02 +00:00
Jim Grosbach
f12eee75d1
Use a StringSwitch<> instead of a manually constructed string matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122530 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 00:03:39 +00:00
Owen Anderson
ec3953ff95
When determining if we can fold (x >> C1) << C2, the bits that we need to verify are zero
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are not the low bits of x, but the bits that WILL be the low bits after the operation completes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:56:24 +00:00
Evan Cheng
e4a2dd2f1a
Code clean up. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122528 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:54:17 +00:00
Jim Grosbach
b0ad9cf935
Remove dead patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:20:13 +00:00
Jim Grosbach
940c8e5494
Recognize a few more documented register name aliases for ARM in the asm lexer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:19:54 +00:00
Bob Wilson
3c904694fc
Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.
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If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 22:45:49 +00:00
Owen Anderson
d5f8684b16
It is possible for SimplifyCFG to cause PHI nodes to become redundant too late in the optimization
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pipeline to be caught by instcombine, and it's not feasible to catch them in SimplifyCFG because the
use-lists are in an inconsistent state at the point where it could know that it need to simplify them.
Instead, have CodeGenPrepare look for trivially redundant PHIs as part of its general cleanup effort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122516 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 20:57:35 +00:00
Chris Lattner
036609bd7d
Flag -> Glue, the ongoing saga
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 18:28:41 +00:00
Chris Lattner
29d8f0cae4
flags -> glue for selectiondag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:24:32 +00:00
Chris Lattner
a4359be032
sdisel flag -> glue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:13:18 +00:00
Benjamin Kramer
9d071cbb92
Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 15:32:07 +00:00
Benjamin Kramer
3e4106105b
Remove some obsolete README items, add a new one off the top of my head.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 15:07:02 +00:00
Andrew Trick
2902736a50
Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122491 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 05:42:20 +00:00
Andrew Trick
3d420cb2fe
Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122474 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 04:16:14 +00:00
Andrew Trick
cb7947b81b
In CheckForLiveRegDef use TRI->getOverlaps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 03:43:21 +00:00
Andrew Trick
1b1658741a
Fixes PR8823: add-with-overflow-128.ll
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In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 03:15:51 +00:00
Mon P Wang
e90a6333c3
Preserve the address space when generating bitcasts for MemTransferInst in ConvertToScalarInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 01:41:32 +00:00
Jeffrey Yasskin
8e68c38735
Change all self assignments X=X to (void)X, so that we can turn on a
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new gcc warning that complains on self-assignments and
self-initializations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 00:58:24 +00:00
Jim Grosbach
9584bd83e6
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 23:26:02 +00:00
Benjamin Kramer
f50125ecaa
DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code.
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example code:
unsigned foo(unsigned x, unsigned y) {
if (x != 0) y--;
return y;
}
before:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
notl %eax ## encoding: [0xf7,0xd0]
addl 8(%esp), %eax ## encoding: [0x03,0x44,0x24,0x08]
ret ## encoding: [0xc3]
after:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
movl 8(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
adcl $-1, %eax ## encoding: [0x83,0xd0,0xff]
ret ## encoding: [0xc3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122455 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 23:17:45 +00:00
Benjamin Kramer
4ac19470dc
InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 23:12:15 +00:00
Benjamin Kramer
e915ff30cd
X86: Lower a select directly to a setcc_carry if possible.
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int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
_test: ## @test
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
ret ## encoding: [0xc3]
instead of
_test: ## @test
xorl %ecx, %ecx ## encoding: [0x31,0xc9]
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
movl $-1, %eax ## encoding: [0xb8,0xff,0xff,0xff,0xff]
cmovael %ecx, %eax ## encoding: [0x0f,0x43,0xc1]
ret ## encoding: [0xc3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 23:09:28 +00:00
Rafael Espindola
10b6d33581
Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been
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fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 22:16:24 +00:00
Rafael Espindola
835439a397
Assert that the AddrDelta expression is really constant and wrap it in a set
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if we have a lame assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 22:04:28 +00:00
Jakob Stoklund Olesen
770d42de3b
When RegAllocGreedy decides to spill the interferences of the current register,
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pick the victim with the lowest total spill weight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122445 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 22:01:30 +00:00
Jakob Stoklund Olesen
c64379da07
Include a shadow of the original CFG edges in the edge bundle graph.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122444 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 22:01:28 +00:00
Rafael Espindola
90a5a0cd7c
Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a much
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better name and matches what is used in the MachO writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 21:51:29 +00:00
Daniel Dunbar
72123334ad
MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122441 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 21:26:43 +00:00
Rafael Espindola
bf57b838b8
Revert r122359 while I debug PR8845.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 19:05:49 +00:00
Matt Beaumont-Gay
33a03c73ef
Fix another conditional expression mismatched enum type warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 18:25:55 +00:00