Commit Graph

11010 Commits

Author SHA1 Message Date
Evan Cheng
e7cbe4118b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 21:03:57 +00:00
Bill Wendling
c3d505c3c2 Recommit r74952 with a bug fix:
DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
       pushl   %ebp
Llabel1:
       movl    %esp, %ebp
Llabel2:
       pushl   %esi
Llabel3:
       subl    $20, %esp
       call    "L1$pb"
"L1$pb":
       popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.

There is some ugliness where we generate code like this:


LBB22_0:	## entry
	pushl	%ebp
Llabel280:
	movl	%esp, %ebp
Llabel281:
Llabel284:
	pushl	%ebp  <----------
	pushl	%ebx
	pushl	%edi
	pushl	%esi
Llabel282:
	subl	$328, %esp

Notice the extra "pushl %ebp". If we generate a "machine move" instruction in
the FDE for that pushl, the linker may get very confused about what value %ebp
should have when exitting the function. I.e., it'll give it the value %esp
instead of the %ebp value from the first "pushl". Not to mention that, in this
case, %ebp isn't modified in the function (that's a separate bug). I put a small
hack in to get it to work. It might be the only solution, but should be
revisited once the above case is fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 21:02:53 +00:00
Torok Edwin
3046470919 Missed an exit during the conversion.
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:55:50 +00:00
Torok Edwin
dac237e182 Implement changes from Chris's feedback.
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:53:28 +00:00
Bob Wilson
2ed334694f Implement NEON vst1 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:32:02 +00:00
David Goodwin
77521f5232 Generalize opcode selection in ARMBaseRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:28:28 +00:00
Xerxes Ranby
cecbc964e1 Fix cmake build.
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:13:41 +00:00
Torok Edwin
804e0fea40 Convert more abort() calls to llvm_report_error().
Also remove trailing semicolon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 19:04:27 +00:00
David Goodwin
db5a71a8e0 Push methods into base class in preparation for sharing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:31:39 +00:00
Bob Wilson
205a5ca6cf Implement NEON vld1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:11:30 +00:00
Torok Edwin
ab7c09b6b6 Start converting to new error handling API.
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:01:40 +00:00
David Goodwin
c140c4803d Start breaking out common base functionality for register info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 17:28:55 +00:00
David Goodwin
334c26473b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 16:09:28 +00:00
Sanjiv Gupta
2d76f256f8 Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 05:40:05 +00:00
Nick Lewycky
7f6aa2b162 Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 03:04:38 +00:00
Evan Cheng
34a0fa362d Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 01:46:35 +00:00
Evan Cheng
c9a4153eef Add a todo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 00:05:05 +00:00
Evan Cheng
0fc0ade095 Also statically set bit 25 for BR_JT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:45:10 +00:00
Evan Cheng
bc8a94540a Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:40:25 +00:00
Bill Wendling
97b4d4a8b5 --- Reverse-merging (from foreign repository) r74952 into '.':
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86RegisterInfo.h

Temporarily revert. This was causing an infinite loop in the linker on Leopard.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:37:49 +00:00
Dale Johannesen
9fcff043fe Commit the file I actually changed as part of last
patch, instead of one I didn't.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:28:22 +00:00
Bill Wendling
66c6324fcf DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
        pushl   %ebp
Llabel1:
        movl    %esp, %ebp
Llabel2:
        pushl   %esi
Llabel3:
        subl    $20, %esp
        call    "L1$pb"
"L1$pb":
        popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 21:53:07 +00:00
Evan Cheng
e253c951b3 Add Thumb2 movcc instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 20:39:03 +00:00
Evan Cheng
1c83eb33c3 Add BX and BXr9 encodings. Patch by Sean Callanan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 19:16:24 +00:00
Owen Anderson
a9d1f2c559 Have scoped mutexes take referenes instead of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 18:33:04 +00:00
Evan Cheng
40289b041a Add Thumb2 pkhbt / pkhtb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 05:35:52 +00:00
Evan Cheng
5b9fcd1c8e Add some more Thumb2 multiplication instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 01:17:28 +00:00
Evan Cheng
58541fd627 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 01:16:41 +00:00
Dale Johannesen
76a1e2e250 Don't accept globals as matching 'i' constraint
in PIC modes (in accordance with existing comment).
gcc.apple/asm-block-25.c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 00:18:49 +00:00
Devang Patel
92c551103f Avoid directly relying on llvm.dbg.compile_unit and llvm.dbg.global_variables.
PIC16 developers, please verify. Thanks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 23:28:36 +00:00
Devang Patel
8d6162a4be Add FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 23:11:08 +00:00
Evan Cheng
3147fb2cff isThumb2 really should mean thumb2 only, not thumb2+.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:29:14 +00:00
Evan Cheng
36a0aebac2 Add bfc to armv6t2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:23:46 +00:00
Evan Cheng
edcbada3d0 Added ARM::mls for armv6t2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:05:45 +00:00
Sanjiv Gupta
53cf8298cf pic16 doesn't have a Data64bitsDirective. Set it NULL explicitly to tell the generic code to not pick the default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74839 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 18:09:11 +00:00
Sanjiv Gupta
024e94ce58 pic16 isn't ready to handle llvm.metadata yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 18:07:06 +00:00
Sanjiv Gupta
505996fdd5 Implement _CONFIG macro to allow users to se to configuration settings on the part.
Implement _section macro to allow users to place objects in specific sections.
Implement _address macro to allow users to place objects at a particular address.
Placing objects at a memory address:
crate a unique section name from varname, address, object type and put that section at specified address. Mark this section a full (size = banksize) so that other objects do not compete for it while placing objects to sections in AsmPrinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74822 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 10:18:37 +00:00
Sanjiv Gupta
d7649417d1 Corrected the names description. Change in a comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 08:22:15 +00:00
Bruno Cardoso Lopes
ac57e6e498 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 05:09:34 +00:00
Duncan Sands
430506924d Silence a warning when assertions are turned off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:11:59 +00:00
Duncan Sands
f7f2d30bb8 Silence a warning when assertions are turned off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:11:34 +00:00
Duncan Sands
10ac96b276 Silence warning when building without assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:06:07 +00:00
Duncan Sands
8d8628a1fe Silence warnings when assertions are turned off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:03:33 +00:00
Sanjiv Gupta
1d2e6ed1ef For extended loads of type i1 to i8, we will need to at least one byte from memory.
The change in the .td file is to mark the side effects of mov insn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 07:58:59 +00:00
Tilmann Scheller
6a3a1ba97e Various small changes related to the Condition Register on PowerPC.
Don't spill to the CR save area when using the SVR4 ABI for now.
Don't rely on constants assigned for registers to be in order (they aren't assigned in order).
Make sure CR bits are mapped to the corresponding CR field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:47:55 +00:00
Tilmann Scheller
2a9ddfb903 Refactor ABI code in the PowerPC backend.
Make CalculateParameterAndLinkageAreaSize() Darwin-specific.
Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin().
Rename MachoABI to DarwinABI for consistency.
Rename ELF ABI to SVR4 ABI for consistency.
Factor out common call return lowering between the Darwin and SVR4 ABI.
Factor out common call lowering between the Darwin and SVR4 ABI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:47:08 +00:00
Tilmann Scheller
ffd0200abf Implement the SVR4 ABI for PowerPC.
Implement LowerFORMAL_ARGUMENTS_SVR4().
Implement LowerCALL_SVR4().
Add support for split arguments.
Implement by value parameter passing for aggregates.
Add support for variable argument lists.
Create the spill area for argument registers of variable argument functions no longer at a fixed offset.
Make sure callee saved registers are spilled to the correct stack offsets.
Change allocation order of non-volatile floating-point registers.
Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls.
Add support for variable argument calls with Vector arguments.
Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers.
Stop creating illegal i8 values in LowerVASTART().
Add memory access width hints.
Make sure to reserve space on the stack for the frame pointer.
When using the SVR4 ABI, reserve r13 for the Small Data Area pointer.
Assure that the frame pointer is spilled to the correct location on the stack.
Some FP registers were not marked as volatile.
Make sure the i64 words from a long double are passed either both in registers or both on the stack.
Only put integer arguments in registers which are not marked with the inreg flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:45:56 +00:00
Tilmann Scheller
6b61cd185e Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:44:53 +00:00
Tilmann Scheller
667ee3cb43 Small cleanups in the PowerPC backend.
Small refactoring in LowerFORMAL_ARGUMENTS().
Correct minor formatting issues.
Remove size argument of CreateCopyOfByValArgument().
Remove dead argument from CalculateStackSlotSize().
Remove unused variable ReturnAddrIndex from various targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74763 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:43:35 +00:00
Evan Cheng
d27c9fc403 Add thumb2 sign / zero extend with rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 01:43:10 +00:00