Commit Graph

5474 Commits

Author SHA1 Message Date
Jim Grosbach
ed6a0c5243 ARM label operands can have an optional '#' before them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01 22:37:37 +00:00
Owen Anderson
60cb643f75 Fix disassembly of some VST1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01 22:18:13 +00:00
Jim Grosbach
681460f954 ARM VLD/VST assembly parsing for symbolic address operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01 01:24:45 +00:00
Jim Grosbach
4334e03252 ARM VST1 w/ writeback assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-31 21:50:31 +00:00
Jim Grosbach
f9f5a765ad ARM writeback vs. stride operands for VST/VLD.
The _fixed variants have a writeback operand, but not a stride operand.
Split the conditional flag to distinguish the cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-31 19:11:23 +00:00
Owen Anderson
fb6ab2b30e More not-crashing NEON disassembly updates for the vld refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-31 17:17:32 +00:00
Dan Gohman
6f3ddef7c5 Revert r143206, as there are still some failing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143262 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-29 00:41:52 +00:00
Jim Grosbach
e70ec84637 ARM mode 'mov' to 'mvn' assembler alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 22:50:54 +00:00
Jim Grosbach
89a6337085 Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".
When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example,
  mov r2, #-3
becomes
  mvn r2, #2

rdar://10349224


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 22:36:30 +00:00
Owen Anderson
b3727fe3ec Specify that the high bit of the alignment field is fixed to 0 on these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 20:43:24 +00:00
Owen Anderson
cb9fed6655 Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143208 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 18:02:13 +00:00
Dan Gohman
bf923b815d Reapply r143177 and r143179 (reverting r143188), with scheduler
fixes: Use a separate register, instead of SP, as the
calling-convention resource, to avoid spurious conflicts with
actual uses of SP. Also, fix unscheduling of calling sequences,
which can be triggered by pseudo-two-address dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 17:55:38 +00:00
Owen Anderson
82418ff4d1 Revert r143202.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 17:38:30 +00:00
Owen Anderson
7ccee5610a Specify fixed bits on CPS instructions to enable roundtripping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 17:29:39 +00:00
Jim Grosbach
5d0492cfc4 Thumb2 ADD/SUB instructions encoding selection outside IT block.
Outside an IT block, "add r3, #2" should select a 32-bit wide encoding
rather than generating an error indicating the 16-bit encoding is only
legal in an IT block (outside, the 'S' suffic is required for the 16-bit
encoding).

rdar://10348481


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 16:57:07 +00:00
Duncan Sands
62c1d00dfd Speculatively disable Dan's commits 143177 and 143179 to see if
it fixes the dragonegg self-host (it looks like gcc is miscompiled).
Original commit messages:
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.

Delete #if 0 code accidentally left in.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143188 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 09:55:57 +00:00
Dan Gohman
2ba60e5930 Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143177 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 01:29:32 +00:00
Jim Grosbach
c73d73eb88 ARM Allow 'q' registers in VLD/VST vector lists.
Just treat it as if the constituent D registers where specified.

rdar://10348896

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143167 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 00:06:50 +00:00
Owen Anderson
04b12a4cfb Add some NEON stores to the VLD decoding hook that were accidentally omitted previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143162 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 22:53:10 +00:00
Jakob Stoklund Olesen
b0117eed84 Also set addrmode6 alignment when align==size.
Previously, we were only setting the alignment bits on over-aligned
loads and stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 22:39:16 +00:00
Jim Grosbach
55dabaa73a ARM isel for vld1, opcode selection for register stride post-index pseudos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 22:25:42 +00:00
Evan Cheng
824a70a384 Avoid partial CPSR dependency from loop backedges. rdar://10357570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 21:21:05 +00:00
Jim Grosbach
88484c0030 Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix.
rdar://10348844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 17:33:59 +00:00
Jim Grosbach
036a67d670 Thumb2 t2MVNi assembly parsing to recognize ".w" suffix.
rdar://10348584


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 17:16:55 +00:00
Chad Rosier
6d64b3adab A branch predicated on a constant can just FastEmit an unconditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 00:21:16 +00:00
Chad Rosier
8ff2664f2f Add a TODO comment. FastISel works by parsing each basic block from the bottom
up.  Thus, improving the support for compares is goodness because it increases
the number of terminator instructions we can handle.  This creates many more 
opportunities for target specific fast-isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 23:34:37 +00:00
Chad Rosier
ade620065d Factor a little more code into EmitCmp, which should have been done in the first
place.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 23:25:44 +00:00
Chad Rosier
75698f346f Use EmitCmp in SelectBranch. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143076 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 23:17:28 +00:00
Chad Rosier
530f7cefd3 Factor out an EmitCmp function that can be used by both SelectCmp and
SelectBranch.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143072 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 22:47:55 +00:00
Jim Grosbach
a581328ceb Thumb2 ldr pc-relative encoding fixes.
We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.

More of rdar://10348687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 22:22:01 +00:00
Jim Grosbach
758a519a22 ARM parse parenthesized expressions for label references.
Partial fix for rdar://10348687.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 21:14:08 +00:00
Lang Hames
75757f9fd1 Make sure short memsets on ARM lower to stores, even when optimizing for size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 20:56:52 +00:00
Jim Grosbach
9c5edc00c4 Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 17:28:15 +00:00
James Molloy
015cca6c08 Revert r142530 at least temporarily while a discussion is had on llvm-commits regarding exactly how much optsize should optimize for size over performance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 08:53:19 +00:00
Bill Wendling
de39d86f26 Use a worklist to prevent the iterator from becoming invalidated because of the 'removeSuccessor' call. Noticed in a Release+Asserts+Check buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 07:16:18 +00:00
Evan Cheng
f31151f34e Revert part of r142530. The patch potentially hurts performance especially
on Darwin platforms where -Os means optimize for size without hurting
performance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 01:17:44 +00:00
Jim Grosbach
399cdca4d2 ARM assembly parsing and encoding for VLD1 with writeback.
Four entry register lists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25 00:14:01 +00:00
Jim Grosbach
b36e03d987 Nuke dead code. Nothing generates the VLD1d64QPseudo_UPD instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:40:46 +00:00
Jim Grosbach
5921675ff5 ARM assembly parsing and encoding for VLD1 w/ writeback.
Three entry register list variation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:26:05 +00:00
Eli Friedman
5c89cb8cd6 Don't crash on variable insertelement on ARM. PR10258.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:08:52 +00:00
Evan Cheng
aed4952753 ARMConstantPoolMBB::print should print BB number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:01:03 +00:00
Jim Grosbach
12431329d6 ARM assembly parsing and encoding for VLD1 w/ writeback.
One and two length register list variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 22:16:58 +00:00
Jim Grosbach
10b90a9bbf ARM refactor am6offset usage for VLD1.
Split am6offset into fixed and register offset variants so the instruction
encodings are explicit rather than relying an a magic reg0 marker.
Needed to being able to parse these.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 21:45:13 +00:00
Owen Anderson
a7c98f58ea Fix a NEON disassembly case that was broken in the recent refactorings. As more of this code gets refactored, a lot of these manual decoding hooks should get smaller and/or go away entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 18:04:29 +00:00
Dan Gohman
692c1d8535 Change this overloaded use of Sched::Latency to be an overloaded
use of Sched::ILP instead, as Sched::Latency is going away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142813 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 17:55:11 +00:00
Jim Grosbach
f8e74f816d Thumb2 LDM instructions can target PC. Make sure to encode it.
PR11220


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142801 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 17:16:24 +00:00
Benjamin Kramer
1a2f9886a2 Move various generated tables into read-only memory, fixing up const correctness along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 16:50:00 +00:00
Bill Wendling
b8dcb314f7 The different flavors of ARM have different valid subsets of registers. Check
that the set of callee-saved registers is correct for the specific platform.
<rdar://problem/10313708> & ctor_dtor_count & ctor_dtor_count-2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22 00:29:28 +00:00
Jim Grosbach
224180e81b Assembly parsing for 4-register sequential variant of VLD2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 23:58:57 +00:00
Jim Grosbach
4661d4cac3 Assembly parsing for 2-register sequential variant of VLD2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 22:21:10 +00:00