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efbdc8e236
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6300 Commits

Author SHA1 Message Date
Chris Lattner
efbdc8e236 minor progress towards fixing PR7465 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-19 01:00:34 +00:00
Bill Wendling
86b98b5874 Marked with ATTRIBUTE_USED so that clang doesn't complain. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-18 18:40:57 +00:00
Chris Lattner
0d857cf8d1 remove some code that is dead now that lea's are modeled with segment registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111343 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-18 02:40:44 +00:00
Anton Korobeynikov
5dad73cec8 Revert part of one of the prev. patches - tailjmp will follow later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111291 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-17 21:08:28 +00:00
Anton Korobeynikov
3a1e54a6b9 More fixes for win64: 
- Do not clobber al during variadic calls, this is AMD64 ABI-only feature
  - Emit wincall64, where necessary
Patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111289 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-17 21:06:07 +00:00
Anton Korobeynikov
e9df15e65c Enable more win64 calls folding opportunities. 
Patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111288 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-17 21:06:01 +00:00
Eli Friedman
bc1fb2b6fa Comment out some broken/unused/useless instructions which mess up disassembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-16 21:18:51 +00:00
Eli Friedman
321473d51d Don't attempt to SimplifyShortMoveForm in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111182 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-16 21:03:32 +00:00
Matt Fleming
453db50333 Hookup ELF support for X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111173 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-16 18:36:14 +00:00
Jakob Stoklund Olesen
de78f05cf7 Partially revert r111155. It looks like MSVC is calling an operator<() that 
clang says is unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-16 18:24:54 +00:00
Jakob Stoklund Olesen
a649ab542d Remove unused functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111155 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-16 17:18:18 +00:00
Argyrios Kyrtzidis
8c8b9ee8c8 Revert r111082. No warnings for this common pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111102 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-15 10:27:23 +00:00
Eric Christopher
c0b2a2018a Rework how the non-sse2 memory barrier is lowered so that the 
encoding is correct for the built-in assembler.

Based on a patch from Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111083 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-14 21:51:50 +00:00
Argyrios Kyrtzidis
7268d97ae6 Add ATTRIBUTE_UNUSED to methods that are not supposed to be used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111082 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-14 21:35:10 +00:00
Chris Lattner
132929aa9e improve indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-14 17:26:09 +00:00
Bruno Cardoso Lopes
30baa63474 Add comments to some pattern fragments in x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111041 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 20:39:01 +00:00
Dale Johannesen
1b4051095d Revert 110491. While not wrong, it was based on a 
misanalysis and is undesirable.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111028 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 18:43:45 +00:00
Bruno Cardoso Lopes
bb0a9489e0 Fix comment to reflect code, and remove an unused argument 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 17:50:47 +00:00
Bruno Cardoso Lopes
bbadd39bbb Improve comment to make explicit why not to touch this could before JIT goes MC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111021 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 17:44:10 +00:00
Eric Christopher
63f02ac349 Revert last patch and r110954 as I meant to. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 02:37:50 +00:00
Eric Christopher
4404c00db6 Revert r110954 for now, pseudo instructions can't make it through to the JIT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111000 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 02:30:00 +00:00
Bruno Cardoso Lopes
64baddc0f2 Some small clean-up: use of pseudo instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110954 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 20:55:18 +00:00
Bruno Cardoso Lopes
642eb02045 - Teach SSEDomainFix to switch between different levels of AVX instructions. Here we guess that AVX will have domain issues, so just implement them for consistency and in the future we remove if it's unnecessary. 
- Make foldMemoryOperandImpl aware of 256-bit zero vectors folding and support the 128-bit counterparts of AVX too.
- Make sure MOV[AU]PS instructions are only selected when SSE1 is enabled, and duplicate the patterns to match AVX.
- Add a testcase for a simple 128-bit zero vector creation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 20:20:53 +00:00
Bruno Cardoso Lopes
6da9cee0f1 Define AVX 128-bit pattern versions of SET0PS/PD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110937 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 18:20:59 +00:00
Bruno Cardoso Lopes
4d04362813 Fix comment order 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110898 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 02:08:52 +00:00
Bruno Cardoso Lopes
8c05a850f4 Begin to support some vector operations for AVX 256-bit intructions. The long 
term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110897 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 02:06:36 +00:00
Daniel Dunbar
09062b1672 MC/X86/AsmParser: Give an explicit error message when we reject an instruction 
because it could have an ambiguous suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 00:55:42 +00:00
Daniel Dunbar
f1e29d4c21 MC/AsmParser: Push the burdon of emitting diagnostics about unmatched 
instructions onto the target specific parser, which can do a better job.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110889 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 00:55:38 +00:00
Daniel Dunbar
4f98f83459 tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl', 
target specific parsers can adapt the TargetAsmParser to this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 00:55:32 +00:00
Jakob Stoklund Olesen
d29583bd32 Fix <rdar://problem/8282498> even if it doesn't reproduce on trunk. 
When a register is defined by a partial load:

  %reg1234:sub_32 = MOV32mr <fi#-1>; GR64:%reg1234

That load cannot be folded into an instruction using the full 64-bit register.
It would become a 64-bit load.

This is related to the recent change to have isLoadFromStackSlot return false on
a sub-register load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110874 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-11 23:08:22 +00:00
Dan Gohman
d881627d33 Use ISD::ADD instead of ISD::SUB with a negated constant. This 
avoids trouble if the return type of TD->getPointerSize() is
changed to something which doesn't promote to a signed type,
and is simpler anyway.

Also, use getCopyFromReg instead of getRegister to read a
physical register's value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110835 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-11 18:14:00 +00:00
Daniel Dunbar
b3cb696794 MCAsmParser: Add dump() hook to MCParsedAsmOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110790 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-11 06:37:04 +00:00
Bruno Cardoso Lopes
045573ce21 Add AVX matching patterns to Packed Bit Test intrinsics. 
Apply the same approach of SSE4.1 ptest intrinsics but
create a new x86 node "testp" since AVX introduces
vtest{ps}{pd} instructions which set ZF and CF depending
on sign bit AND and ANDN of packed floating-point sources.

This is slightly different from what the "ptest" does.
Tests comming with the other 256 intrinsics tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 23:25:42 +00:00
Bruno Cardoso Lopes
9f798e9a9e Add AVX movnt{pd,ps,dq} 256-bit intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 02:49:24 +00:00
Bruno Cardoso Lopes
fcfcca1d9b Add AVX movmsk 256-bit intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 02:34:56 +00:00
Bruno Cardoso Lopes
405f11b300 Support AVX 256-bit load and store intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 01:43:16 +00:00
Bruno Cardoso Lopes
6719784148 Patterns to match AVX cmp instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110633 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 00:13:20 +00:00
Bruno Cardoso Lopes
533a7df02d Add matching patterns for vblend AVX intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 00:02:05 +00:00
Eric Christopher
5cb33a384f Wording. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110618 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-09 22:52:47 +00:00
Bruno Cardoso Lopes
93f6c1ec6e Add VCVTPD2PS, VCVTPS2DQ, VCVTPS2PDY, VCVTTPD2DQY, VCVTTPS2DQ and VCVTPD2DQ 256-bit conversion intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-09 21:51:56 +00:00
Bruno Cardoso Lopes
8468157278 Add patterns to AVX conversions instructions. Do that instead of declaring more intructions whenever is possible, more coming 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110605 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-09 21:24:59 +00:00
Oscar Fuentes
4951870e04 CMake: eliminated unnecessary target_link_libraries. 
Next time the build is broken due to wrong library dependencies, just
try building again (if you are on some Unix and are building all LLVM
targets) or ask someone to commit the regenerated LLVMLibDeps.cmake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-09 20:33:08 +00:00
Bruno Cardoso Lopes
ad4910429c Memory version of vcvtdq2pd intrinsic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-09 18:20:14 +00:00
Bruno Cardoso Lopes
251871ca66 Patterns to match vinsert, vbroadcast, vmovmask and vcvtdq2pd AVX intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110580 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-09 18:03:43 +00:00
Dale Johannesen
7f6eb639bd Use sdmem and sse_load_f64 (etc.) for the vector 
form of CMPSD (etc.)  Matching a 128-bit memory
operand is wrong, the instruction uses only 64 bits
(same as ADDSD etc.)  8193553.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110491 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-07 00:33:42 +00:00
Bruno Cardoso Lopes
4945dd8314 Patterns to match AVX 256-bit vzero intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 22:10:01 +00:00
Bruno Cardoso Lopes
bd2d90f5a5 Patterns to match AVX 256-bit permutation intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 20:03:27 +00:00
Owen Anderson
90c579de5a Reapply r110396, with fixes to appease the Linux buildbot gods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 18:33:48 +00:00
Bruno Cardoso Lopes
9c3806461c Patterns to match AVX 256-bit horizontal arithmetic intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 02:10:30 +00:00
Bruno Cardoso Lopes
9c09f16a53 Patterns to match AVX 256-bit arithmetic intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110425 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 01:52:29 +00:00