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24 Commits

Author SHA1 Message Date
Dan Gohman
a6063c6e29 Rename @llvm.debugger to @llvm.debugtrap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-14 18:58:10 +00:00
Dan Gohman
d4347e1af9 Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(), 
but it generates int3 on x86 instead of ud2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-11 00:19:32 +00:00
Preston Gurd
3d142e58ef Adds Intel Atom scheduling latencies to X86InstrSystem.td. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156194 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-04 19:26:37 +00:00
Bill Wendling
e060eb8916 Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax. 
Patch by Kay Tiong Khoo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152487 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-10 07:37:27 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Devang Patel
c16d96f6f4 Fix asm string wrt variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147805 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-09 21:32:02 +00:00
Craig Topper
e7b05504fa Add intrinsics and feature flag for read/write FS/GS base instructions. Also add AVX2 feature flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143319 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-30 19:57:21 +00:00
Kevin Enderby
55c4127134 Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and 
not depend on In32BitMode.  Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode.  rdar://9738584


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143112 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-27 17:40:41 +00:00
Craig Topper
dc479c4a89 Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142117 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 07:05:40 +00:00
Craig Topper
75fe5f3bab Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141358 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-07 07:02:24 +00:00
Craig Topper
1b526a98e3 Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-07 05:53:50 +00:00
Craig Topper
adf01b3f18 Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 07:01:50 +00:00
Joerg Sonnenberger
ca0ede7655 Recognize the xstorerng alias for VIA PadLock's xstore instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134126 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 01:38:03 +00:00
Chris Lattner
15f8951799 fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately, 
InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129223 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 19:41:05 +00:00
Joerg Sonnenberger
4a8ac8de1d Add support for the VIA PadLock instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-04 16:58:13 +00:00
Eli Friedman
ac39bd534b PR9377: Handle x86 str with register operand in a way consistent with gas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 00:10:17 +00:00
Rafael Espindola
87ca0e077d Implement xgetbv and xsetbv. 
Patch by Jai Menon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126165 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 00:35:18 +00:00
Kevin Enderby
529b1a4398 Added the x86 instruction ud2b (2nd official undefined instruction). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:46:49 +00:00
Andrew Trick
0966ec0861 Reverting r117031 to cleanup valgrind errors. 
It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 03:58:29 +00:00
Kevin Enderby
0b9325c97d More tweaks to X86 instructions to allow the 'w' suffix in places it makes 
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 17:16:46 +00:00
Kevin Enderby
87f4a1a433 Added a few tweaks to the Intel Descriptor-table support instructions to allow 
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes.  This is again for use just with assembly source for llvm-mc .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 00:01:44 +00:00
Chris Lattner
010496c6a7 move the atomic pseudo instructions out to X86InstrCompiler.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:22:35 +00:00
Chris Lattner
87be16a9e1 continue moving stuff out to X86InstrSystem.td. Move 
control flow stuff out to X86InstrControl.td.  Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:04:14 +00:00
Chris Lattner
434c7cb8a1 refactor .td files a bit, moving system instructions out to X86InstrSystem.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 05:32:15 +00:00