Commit Graph

92796 Commits

Author SHA1 Message Date
Eric Christopher
f0aefa858c Remove a few fixmes, the only work we're doing is getting the string
to return and this is done all over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183704 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 22:24:10 +00:00
Eric Christopher
0fbaa37873 Fix up comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183703 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 22:24:07 +00:00
Eric Christopher
175a7809c8 Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183698 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 21:59:28 +00:00
Eric Christopher
d32d7a541a IndentCount is only used within NDEBUG code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183695 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 20:58:53 +00:00
Tim Northover
e5609f3732 X86: Stop LEA64_32r doing unspeakable things to its arguments.
Previously LEA64_32r went through virtually the entire backend thinking it was
using 32-bit registers until its blissful illusions were cruelly snatched away
by MCInstLower and 64-bit equivalents were substituted at the last minute.

This patch makes it behave normally, and take 64-bit registers as sources all
the way through. Previous uses (for 32-bit arithmetic) are accommodated via
SUBREG_TO_REG instructions which make the types and classes agree properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 20:43:49 +00:00
Rafael Espindola
6d315c6cf2 Add a missing 'e'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 20:32:27 +00:00
Benjamin Kramer
aca93cf44f tblgen: Assert that InstRWs doesn't grows when we don't expect it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 20:19:35 +00:00
Ulrich Weigand
278916500a [PowerPC] Support extended sc mnemonic
A plain "sc" without argument is supposed to be treated like "sc 0"
by the assembler.  This patch adds a corresponding alias.

Problem reported by Joerg Sonnenberger.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183687 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 17:19:43 +00:00
Ulrich Weigand
7c6f90d486 [PowerPC] Support branch mnemonics with implied CR0
The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified.  This patch
adds extra variants of the mnemonics to this effect.

Problem reported by Joerg Sonnenberger.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 17:19:15 +00:00
Ulrich Weigand
b838f9fe61 [PowerPC] Use multiclass to generate extended branch mnemonics
This patch removes some redundancy by generating the extended branch
mnemonics via a multiclass.

No change in behaviour expected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 17:18:29 +00:00
Aaron Ballman
6c1bd2919e Silencing an MSVC warning about comparing signed and unsigned values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183682 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 16:45:40 +00:00
Rafael Espindola
27b7adef95 Remove the old IdentifyFileType now that lld was updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183671 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 15:37:29 +00:00
Rafael Espindola
f12745f7a7 Pass a StringRef to sys::identifyFileType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183669 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 15:27:39 +00:00
Rafael Espindola
b972457783 Fix an out of bounds array access.
We were looking at Magic[5] without checking Length. Since this path would not
return unless Length >= 18 anyway, just move the >= 18 check up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183666 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 15:22:18 +00:00
Rafael Espindola
91de80a535 Update for current naming conventions.
I will change identifyFileType to use a StringRef in the next patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183664 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 14:56:16 +00:00
Amaury de la Vieuville
38946caa43 Fix misleading comments in ARMAsmParser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183657 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 14:17:15 +00:00
Amaury de la Vieuville
4e9a96d810 ARM: ISB cannot be passed the same options as DMB
ISB should only accepts full system sync, other options are reserved

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 14:17:08 +00:00
Justin Holewinski
7c32502a7f [NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183652 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 13:29:47 +00:00
Duncan Sands
48d5e750a8 Avoid warnings about unused parameters that tend to come up a lot when
building outside projects with a different compiler than that used to build
LLVM itself (eg switching between gcc and clang).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183650 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 12:09:30 +00:00
JF Bastien
366d94e16c Add test for ARM FastISel load/store register classes
r183624 fixed an issue that was tested indirectly. Test it directly with this new test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 00:35:57 +00:00
Reed Kotler
b0ee97a366 Fix a regression I introduced when I expanded the complex pseudos in
the Mips16 port. A few of the psuedos could either take signed
or unsigned arguments and I did not distinguish the case and improperly
rejected some valid cases that the assembler had previously accepted
when they were pure pseudos that expanded as assembly instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183633 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 23:23:46 +00:00
Benjamin Kramer
068ecc15c0 tblgen: always lookup values from the original vector as it could be grown under our feet.
PR16281.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183630 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 15:20:23 +00:00
Benjamin Kramer
3ade978551 Add a const version of findNearestCommonDominator to PostDom for convenience.
PR16283.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183629 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 15:09:30 +00:00
Logan Chien
c8ecf53082 Refine the ARM EHABI test cases.
Since we have ARM unwind directive parser and assembler, we
can check the correctness in two stages:

1. From LLVM assembly (.ll) to ARM assembly (.s)
2. From ARM assembly (.s) to ELF object file (.o)

We already have several "*.s to *.o" test cases.  This CL adds
some "*.ll to *.s" test cases and removes the redundant "*.ll to *.o"
test cases.

New test cases to check "*.ll to *.s" code generator:

- ehabi.ll: Check the correctness of the generated unwind directives.
- section-name.ll: Check the section name of functions.

Removed test cases:

- ehabi-mc-cantunwind.ll
  (Covered by ehabi-cantunwind.ll, and eh-directive-cantunwind.s)
- ehabi-mc-compact-pr0.ll
  (Covered by ehabi.ll, eh-compact-pr0.s, eh-directive-save.s, and
   eh-directive-setfp.s)
- ehabi-mc-compact-pr1.ll
  (Covered by ehabi.ll, eh-compact-pr1.s, eh-directive-save.s, and
   eh-directive-setfp.s)
- ehabi-mc.ll
  (Covered by ehabi.ll, and eh-directive-integrated-test.s)
- ehabi-mc-section-group.ll
  (Covered by section-name.ll, and eh-directive-section-comdat.s)
- ehabi-mc-section.ll
  (Covered by section-name.ll, and eh-directive-section.s)
- ehabi-mc-sh_link.ll
  (Covered by eh-directive-text-section.s, and eh-directive-section.s)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183628 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 12:36:57 +00:00
Logan Chien
18cba562c8 Fix ARM unwind opcode assembler in several cases.
Changes to ARM unwind opcode assembler:

* Fix multiple .save or .vsave directives.  Besides, the
  order is preserved now.

* For the directives which will generate multiple opcodes,
  such as ".save {r0-r11}", the order of the unwind opcode
  is fixed now, i.e. the registers with less encoding value
  are popped first.

* Fix the $sp offset calculation.  Now, we can use the
  .setfp, .pad, .save, and .vsave directives at any order.

Changes to test cases:

* Add test cases to check the order of multiple opcodes
  for the .save directive.

* Fix the incorrect $sp offset in the test case.  The
  stack pointer offset specified in the test case was
  incorrect.  (Changed test cases: ehabi-mc-section.ll and
  ehabi-mc.ll)

* The opcode to restore $sp are slightly reordered.  The
  behavior are not changed, and the new output is same
  as the output of GNU as.  (Changed test cases:
  eh-directive-pad.s and eh-directive-setfp.s)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183627 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 12:22:30 +00:00
Elena Demikhovsky
40e071c1eb Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183626 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 07:37:10 +00:00
Tim Northover
d84b17e157 Make DeadArgumentElimination more conservative on variadic functions
Variadic functions are particularly fragile in the face of ABI changes, so this
limits how much the pass changes them

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183625 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 02:17:27 +00:00
JF Bastien
1fe907e7f2 ARM FastISel fix load register classes
The register classes when emitting loads weren't quite restricting enough, leading to MI verification failure on the result register.

These are new failures that weren't there the first time I tried enabling ARM FastISel for new targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183624 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 00:20:24 +00:00
David Majnemer
a2f8d37fb7 TargetLowering: Clean up method description comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183623 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 23:51:45 +00:00
Aaron Ballman
0c79301807 sys::process::get_id() now returns the process ID instead of a process handle on Windows. Patch thanks to Kim Gräsman!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 20:29:03 +00:00
Venkatraman Govindaraju
1799921672 [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183613 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 15:32:59 +00:00
Amaury de la Vieuville
9eefea009f ARM: fix VMOVvnf32 decoding when ambiguous with VCVT
Enforce Table A7-15 (op=1, cmode=0b111) -> UNDEF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183612 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 13:54:05 +00:00
Amaury de la Vieuville
ae50ddb2ae ARM: enforce SRS decoding constraints
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183611 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 13:43:59 +00:00
Amaury de la Vieuville
46e136c952 ARM: fix CPS decoding when ambiguous with QADD
Handle the case when the disassembler table can't tell
the difference between some encodings of QADD and CPS.

Add some necessary safe guards in CPS decoding as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 13:38:52 +00:00
Amaury de la Vieuville
c64835b0c5 ARM: fix VCVT decoding
UNPRED was reported instead of UNDEF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 13:29:11 +00:00
Logan Chien
2dce4f27ef Update code listings in LLVM tutorial.
Several LLVM headers are moved.  The code listings in
LLVM tutorial are not updated yet.

This CL removes the code replica in the .rst, and replace
them with a literalinclude directive, so that sphinx can
include the latest code automatically.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 09:03:03 +00:00
Shuxin Yang
9792b646c6 Fix a potential bug in r183584.
r183584 tries to derive some info from the code *AFTER* a call and apply
these derived info to the code *BEFORE* the call, which is not always safe
as the call in question may never return, and in this case, the derived
info is invalid.
  
  Thank Duncan for pointing out this potential bug.

rdar://14073661 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 04:56:05 +00:00
Sean Silva
dbfb960e74 Don't artifically restrict input object size.
sys::IdentifyFileType is already conscious of the length, and
object_error::invalid_file_type is returned below anyway if
sys::IdentifyFileType doesn't recognize the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183605 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 04:32:59 +00:00
JF Bastien
2c69e90064 Fix unused variable warning from my previous patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183601 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 00:51:51 +00:00
Akira Hatanaka
7462a875d9 [mips] Use a helper function which compares the size of the source and
destination operands of an instruction.

No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183596 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 00:14:54 +00:00
Quentin Colombet
c0cc28301a Reapply r183552. This time, use a standard type for the option to avoid template
instantiation issue with non-standard type.

Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183595 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-08 00:07:54 +00:00
Vincent Lejeune
843c6c2d0e R600: Use a refined heuristic to choose when switching clause
This is using a hint from AMD APP OpenCL Programming Guide with
empirically tweaked parameters.
I used Unigine Heaven 3.0 to determine best parameters on my system
(i7 2600/Radeon 6950/Kernel 3.9.4) the benchmark :
it went from 38.8 average fps to 39.6, which is ~3% gain.
(Lightmark 2008.2 gain is much more marginal: from 537 to 539)

There is no lit test provided as the parameter were determined
empirically and it it would be nearly impossiblet to find a test
program that check for optimal behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 23:30:34 +00:00
Vincent Lejeune
b01bdf87ff R600: Anti dep better handled in tex clause
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183592 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 23:30:26 +00:00
Jakob Stoklund Olesen
ec2aaad01b Remember the anyext patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183589 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 22:59:29 +00:00
Jakob Stoklund Olesen
7de1d327f1 Add missing zextloadi1 to i64 patterns. PR16721.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183587 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 22:55:05 +00:00
Shuxin Yang
1c2b03aae9 Fix an assertion in MemCpyOpt pass.
The MemCpyOpt pass is capable of optimizing:
      callee(&S); copy N bytes from S to D.
    into:
      callee(&D);
subject to some legality constraints. 

  Assertion is triggered when the compiler tries to evalute "sizeof(typeof(D))",
while D is an opaque-typed, 'sret' formal argument of function being compiled.
i.e. the signature of the func being compiled is something like this:
  T caller(...,%opaque* noalias nocapture sret %D, ...)

  The fix is that when come across such situation, instead of calling some
utility functions to get the size of D's type (which will crash), we simply
assume D has at least N bytes as implified by the copy-instruction.

rdar://14073661 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183584 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 22:45:21 +00:00
Hal Finkel
40be73bed7 Disallow i64 div/rem in PPC32 counter loops
On PPC32, [su]div,rem on i64 types are transformed into runtime library
function calls. As a result, they are not allowed in counter-based loops (the
counter-loops verification pass caught this error; this change fixes PR16169).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183581 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 22:16:19 +00:00
Quentin Colombet
95f24fbe4c Revert commits related to stack warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 22:14:50 +00:00
Quentin Colombet
2e10e8e378 Explicit triple in warn stack size test cases to not depend on OS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183574 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 21:09:42 +00:00
Bill Wendling
e488b4ecdc Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183572 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 21:04:35 +00:00