Commit Graph

66510 Commits

Author SHA1 Message Date
Zoran Jovanovic
f5c2d3896b Added support for LWU microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199315 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 13:01:18 +00:00
David Majnemer
f62176f047 WinCOFF: Transform IR expressions featuring __ImageBase into image relative relocations
MSVC on x64 requires that we create image relative symbol
references to refer to RTTI data. Seeing as how there is no way to
explicitly make reference to a given relocation type in LLVM IR, pattern
match expressions of the form &foo - &__ImageBase.

Differential Revision: http://llvm-reviews.chandlerc.com/D2523


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199312 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:16:42 +00:00
Elena Demikhovsky
a1bcd56f68 Fixed identation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199301 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 07:18:11 +00:00
Andrew Trick
d5a74a754d Fix PR18449: SCEV needs more precise max BECount for multi-exit loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 06:42:11 +00:00
Craig Topper
33ce2bd3de Add OpSize16 to the two byte forms of INC/DEC that we only use in 64-bit mode and a 64-bit only LEA. Even though we'll not be in 16-bit mode when we use them it makes their tables consistent with their 32-bit counterparts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:20:59 +00:00
Jiangning Liu
b6db372c96 For AArch64, lowering sext_inreg and generate optimized code by using SXTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199296 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:08:01 +00:00
Hans Wennborg
89fa06ba0f Switch-to-lookup tables: set threshold to 3 cases
There has been an old FIXME to find the right cut-off for when it's worth
analyzing and potentially transforming a switch to a lookup table.

The switches always have two or more cases. I could not measure any speed-up
by transforming a switch with two cases. A switch with three cases gets a nice
speed-up, and I couldn't measure any compile-time regression, so I think this
is the right threshold.

In a Clang self-host, this causes 480 new switches to be transformed,
and reduces the final binary size with 8 KB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:00:27 +00:00
Arnold Schwaighofer
e96fec2e43 LoopVectorize: Only strip casts from integer types when replacing symbolic
strides

Fixes PR18480.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199291 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:35:46 +00:00
Rafael Espindola
574df95d7a Fix uninitialized variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:27:26 +00:00
Rafael Espindola
f6cb056e41 Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:07:12 +00:00
Weiming Zhao
2a0c41756b PR 18466: Fix ARM Pseudo Expansion
When expanding neon pseudo stores, it may miss the implicit uses of sub
regs, which may cause post RA scheduler reorder instructions that
breakes anti dependency.

For example:
  VST1d64QPseudo %R0<kill>, 16, %Q9_Q10, pred:14, pred:%noreg
  will be expanded to
    VST1d64Q %R0<kill>, 16, %D18, pred:14, pred:%noreg;

An instruction that defines %D20 may be scheduled before the store by
mistake.

This patches adds implicit uses for such case. For the example above, it
emits:
  VST1d64Q %R0<kill>, 8, %D18, pred:14, pred:%noreg, %Q9_Q10<imp-use>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199282 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 01:32:12 +00:00
Rafael Espindola
0be7e6ffb1 Make parseBitcodeFile return an ErrorOr<Module *>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199279 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 01:08:23 +00:00
Eric Christopher
cd94a7676a Make sure we emit a relocation to the debug_ranges section in the
presence of CU ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 00:04:29 +00:00
Rafael Espindola
1dc66089e6 Return an error_code from materializeAllPermanently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199275 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 23:51:27 +00:00
Rafael Espindola
06a3bddb36 Use error_code in Module::materializeAll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199269 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 23:02:01 +00:00
Tim Northover
196c8e5fbb ARM: correctly determine final tBX_LR in Thumb1 functions
The changes caused by folding an sp-adjustment into a "pop" previously
disrupted the forward search for the final real instruction in a
terminating block. This switches to a backward search (skipping debug
instrs).

This fixes PR18399.

Patch by Zhaoshi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:53:28 +00:00
Tim Northover
4e1247b836 AArch64: don't try to handle [SU]MUL_LOHI nodes
We should set them to expand for now since there are no patterns
dealing with them. Actually, there are no instructions either so I
doubt they'll ever be acceptable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199265 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:53:22 +00:00
Eric Christopher
6389abdd02 Enable use of ranges for translation units in the presence of
-ffunction-sections and update comments and TODOs about other
places that we should enable this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199263 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:44:17 +00:00
Matt Arsenault
0445dc203b Do pointer cast simplifications on addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199254 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 20:00:45 +00:00
Matt Arsenault
e16fa983bf Remove a check for an illegal condition.
Bitcasts can't be between address spaces anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199253 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:56:57 +00:00
Lang Hames
5f33cbc414 Add FPExt option to CCValAssign::LocInfo. When generating calling-convention
promotion code, Tablegen will now select FPExt for floating point promotions
(previously it had returned AExt, which is not valid for floating point types).

Any out-of-tree targets that were relying on AExt being returned for FP
promotions will need to update their code check for FPExt instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199252 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:56:36 +00:00
Rafael Espindola
abcf5f971a Revert "[AArch64] Added vselect patterns with float and double types"
This reverts commit r199242.

It is causing CodeGen/AArch64/neon-bsl.ll to fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199248 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:24:08 +00:00
Matt Arsenault
60ecc44266 Make nocapture analysis work with addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199246 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:11:52 +00:00
Rafael Espindola
1c3e47c07a Fix a low hanging use of hasRawTextSupport.
This also fixes the placement of the function label comment. It was being
placed next to the mips16 directive instead of next to the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199245 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 18:57:12 +00:00
Duncan P. N. Exon Smith
3e4542b2ca Reapply "LTO: add API to set strategy for -internalize"
Reapply r199191, reverted in r199197 because it carelessly broke
Other/link-opts.ll.  The problem was that calling
createInternalizePass("main") would select
createInternalizePass(bool("main")) instead of
createInternalizePass(ArrayRef<const char *>("main")).  This commit
fixes the bug.

The original commit message follows.

Add API to LTOCodeGenerator to specify a strategy for the -internalize
pass.

This is a new attempt at Bill's change in r185882, which he reverted in
r188029 due to problems with the gold linker.  This puts the onus on the
linker to decide whether (and what) to internalize.

In particular, running internalize before outputting an object file may
change a 'weak' symbol into an internal one, even though that symbol
could be needed by an external object file --- e.g., with arclite.

This patch enables three strategies:

- LTO_INTERNALIZE_FULL: the default (and the old behaviour).
- LTO_INTERNALIZE_NONE: skip -internalize.
- LTO_INTERNALIZE_HIDDEN: only -internalize symbols with hidden
  visibility.

LTO_INTERNALIZE_FULL should be used when linking an executable.

Outputting an object file (e.g., via ld -r) is more complicated, and
depends on whether hidden symbols should be internalized.  E.g., for
ld -r, LTO_INTERNALIZE_NONE can be used when -keep_private_externs, and
LTO_INTERNALIZE_HIDDEN can be used otherwise.  However,
LTO_INTERNALIZE_FULL is inappropriate, since the output object file will
eventually need to link with others.

lto_codegen_set_internalize_strategy() sets the strategy for subsequent
calls to lto_codegen_write_merged_modules() and lto_codegen_compile*().

<rdar://problem/14334895>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199244 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 18:52:17 +00:00
Ana Pazos
cba390a29e [AArch64] Added vselect patterns with float and double types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199242 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 18:45:48 +00:00
Nico Rieck
1491ef7dc4 Handle dllexport for global aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199219 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 15:23:25 +00:00
Nico Rieck
38f68c5a2e Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.

Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:

  define available_externally dllimport void @f() {}
  @Var = dllexport global i32 1, align 4

Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 15:22:47 +00:00
Elena Demikhovsky
d05a6582da AVX-512: optimized scalar compare patterns
removed AVX512SI format, since it is similar to AVX512BI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 15:10:08 +00:00
Patrik Hagglund
fc40386116 Fix valgrind warning for gcc builds.
Sorry, I don't understand why the warning is generated (a gcc
bug?). Anyhow, the change should improve readablity. No functionality
change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199214 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 14:09:00 +00:00
Andrea Di Biagio
527fa8c18c [X86] Fix assertion failure caused by a wrong folding of vector shifts by immediate count.
This fixes a regression intruced by r198113.

Revision r198113 introduced an algorithm that tries to fold a vector shift
by immediate count into a build_vector if the input vector is a known vector
of constants.

However the algorithm only worked under the assumption that the input vector
type and the shift type are exactly the same.

This patch disables the folding of vector shift by immediate count if the
input vector type and the shift value type are not the same.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199213 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 13:17:12 +00:00
Tim Northover
6849f102ca ARM: add constraint that RdLo != Rn != RdHi for v5 MLA insts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199212 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 13:05:47 +00:00
Tim Northover
6e533d710d ARM: remove unused UMAALv5 node
It was incorrect anyway, since it didn't have accumulator inputs and wasn't
even supported on v5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199211 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 13:05:42 +00:00
Nico Rieck
55463f4ec1 Revert "Decouple dllexport/dllimport from linkage"
Revert this for now until I fix an issue in Clang with it.

This reverts commit r199204.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199207 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 12:38:32 +00:00
Nico Rieck
62b811443d Revert "Handle dllexport for global aliases"
This reverts commit r199205.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199206 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 12:36:54 +00:00
Nico Rieck
f32b968e7f Handle dllexport for global aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199205 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 11:55:40 +00:00
Nico Rieck
bce07a0c3b Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.

Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:

  define available_externally dllimport void @f() {}
  @Var = dllexport global i32 1, align 4

Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199204 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 11:55:03 +00:00
Nico Rieck
1b1321f080 Fix fastcall mangling of dllimported symbols
fastcall requires @ as global prefix instead of _ but getNameWithPrefix
wrongly assumes the OutName buffer is empty and replaces at index 0.
For imported functions this buffer is pre-filled with "__imp_" resulting
in broken "@_imp_foo@0" mangling.

Instead replace at the proper index. We also never have to prepend the
@-prefix because this fastcall mangling is only used on 32-bit Windows
targets which have _ has global prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 11:53:26 +00:00
NAKAMURA Takumi
d13b9da1b6 Revert r199191, "LTO: add API to set strategy for -internalize"
Please update also Other/link-opts.ll, in next time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 09:40:18 +00:00
Craig Topper
525ae45240 Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode.
This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199193 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 07:41:20 +00:00
Duncan P. N. Exon Smith
67af0456bc LTO: add API to set strategy for -internalize
Add API to LTOCodeGenerator to specify a strategy for the -internalize
pass.

This is a new attempt at Bill's change in r185882, which he reverted in
r188029 due to problems with the gold linker.  This puts the onus on the
linker to decide whether (and what) to internalize.

In particular, running internalize before outputting an object file may
change a 'weak' symbol into an internal one, even though that symbol
could be needed by an external object file --- e.g., with arclite.

This patch enables three strategies:

- LTO_INTERNALIZE_FULL: the default (and the old behaviour).
- LTO_INTERNALIZE_NONE: skip -internalize.
- LTO_INTERNALIZE_HIDDEN: only -internalize symbols with hidden
  visibility.

LTO_INTERNALIZE_FULL should be used when linking an executable.

Outputting an object file (e.g., via ld -r) is more complicated, and
depends on whether hidden symbols should be internalized.  E.g., for
ld -r, LTO_INTERNALIZE_NONE can be used when -keep_private_externs, and
LTO_INTERNALIZE_HIDDEN can be used otherwise.  However,
LTO_INTERNALIZE_FULL is inappropriate, since the output object file will
eventually need to link with others.

lto_codegen_set_internalize_strategy() sets the strategy for subsequent
calls to lto_codegen_write_merged_modules() and lto_codegen_compile*().

<rdar://problem/14334895>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199191 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 06:37:26 +00:00
Jakob Stoklund Olesen
5b8e04cd71 Always let value types influence register classes.
When creating a virtual register for a def, the value type should be
used to pick the register class. If we only use the register class
constraint on the instruction, we might pick a too large register class.

Some registers can store values of different sizes. For example, the x86
xmm registers can hold f32, f64, and 128-bit vectors. The three
different value sizes are represented by register classes with identical
register sets: FR32, FR64, and VR128. These register classes have
different spill slot sizes, so it is important to use the right one.

The register class constraint on an instruction doesn't necessarily care
about the size of the value its defining. The value type determines
that.

This fixes a problem where InstrEmitter was picking 32-bit register
classes for 64-bit values on SPARC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 06:18:38 +00:00
Jakob Stoklund Olesen
aaf6cbdc7e Switch the NEON register class from QPR to DPair.
The already allocatable DPair superclass contains odd-even D register
pair in addition to the even-odd pairs in the QPR register class. There
is no reason to constrain the set of D register pairs that can be used
for NEON values. Any NEON instructions that require a Q register will
automatically constrain the register class to QPR.

The allocation order for DPair begins with the QPR registers, so
register allocation is unlikely to change much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199186 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 06:18:34 +00:00
Rafael Espindola
3c733ea064 Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".
This matches what gnu as does and implementing this is easier than arguing
about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199181 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 04:25:13 +00:00
Mark Seaborn
dfa550a176 Fix llc to not reuse spill slots in functions that invoke setjmp()
We need to ensure that StackSlotColoring.cpp does not reuse stack
spill slots in functions that call "returns_twice" functions such as
setjmp(), otherwise this can lead to miscompiled code, because a stack
slot would be clobbered when it's still live.

This was already handled correctly for functions that call setjmp()
(though this wasn't covered by a test), but not for functions that
invoke setjmp().

We fix this by changing callsFunctionThatReturnsTwice() to check for
invoke instructions.

This fixes PR18244.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199180 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 04:20:01 +00:00
Rafael Espindola
e99ebe7d0c Make getTargetStreamer return a possibly null pointer.
This will allow it to be called from target independent parts of the main
streamer that don't know if there is a registered target streamer or not. This
in turn will allow targets to perform extra actions at specified points in the
interface: add extra flags for some labels, extra work during finalization, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199174 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 01:21:46 +00:00
Cameron McInally
486fdf2e65 Fix uninitialized warning in llvm/lib/IR/DataLayout.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199147 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 22:04:55 +00:00
Juergen Ributzka
df7e862802 [DAG] Refactor ReassociateOps - no functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199146 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 21:49:25 +00:00
Juergen Ributzka
298d1a6b21 [DAG] Teach DAG to also reassociate vector operations
This commit teaches DAG to reassociate vector ops, which in turn enables
constant folding of vector op chains that appear later on during custom lowering
and DAG combine.

Reviewed by Andrea Di Biagio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 20:51:35 +00:00
Andrew Trick
de0847d6a5 Hide the pre-RA-sched= option.
This is a very confusing option for a feature that will go away.

-enable-misched is exposed instead to help triage issues with the new
scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199133 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 20:08:27 +00:00