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f7333bf4a2
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3374 Commits

Author SHA1 Message Date
Nate Begeman
f7333bf4a2 Don't attempt to create VZEXT_LOAD out of an extload. This an issue where the 
code generator would do something like this:

f64 = load f32 <anyext>, f32mem
v2f64 = insertelt undef, %0, 0
v2f64 = insertelt %1, 0.0, 1

into 

v2f64 = vzext_load f32mem

which on x86 is movsd, when you really wanted a cvtss2sd/movsd pair.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51624 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-28 00:24:25 +00:00
Evan Cheng
a31593901d Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51533 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 02:56:30 +00:00
Evan Cheng
e716bb1c59 Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51531 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 02:14:05 +00:00
Evan Cheng
fe5b159ae2 This is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51526 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 00:10:13 +00:00
Evan Cheng
999dbe6bbc Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51522 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 00:07:29 +00:00
Evan Cheng
cd0baf21a1 Use movlps / movhps to modify low / high half of 16-byet memory location. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51501 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 21:23:16 +00:00
Dan Gohman
a9e75631a7 Elaborate on the entry on integer vector multiplication by constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51491 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 18:05:39 +00:00
Evan Cheng
50f778deed Fix a duplicated pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51490 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 18:00:18 +00:00
Dan Gohman
0b924dcef8 Use PMULDQ for v2i64 multiplies when SSE4.1 is available. And add 
load-folding table entries for PMULDQ and PMULLD.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51489 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 17:49:40 +00:00
Evan Cheng
d4083d01d2 New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51487 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 17:28:11 +00:00
Chris Lattner
3adaa93700 we compile multiply-by-constant into horrible code. Doesn't sse4 have some 
instruction for doing this?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51473 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 04:29:53 +00:00
Evan Cheng
b1938263c7 Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks. 
Also fixed some 80 col. violations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51462 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 00:37:07 +00:00
Dale Johannesen
bbcb34cafb Put const weak stuff in appropriate section on Darwin. 
g++.dg/abi/key2.C



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51458 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-23 00:16:59 +00:00
Evan Cheng
5bbaf01b84 X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51455 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-22 23:55:24 +00:00
Evan Cheng
c36c0ab44b Add missing patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51435 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-22 18:56:56 +00:00
Evan Cheng
8e8de684c7 movsd and movq do not require 16-byte alignment. This fixes vec_set-5.ll on Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51327 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-20 18:24:47 +00:00
Evan Cheng
a125e62117 runOnMachineFunction should set IsPIC because relocation model may have been changed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51291 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-20 01:56:59 +00:00
Dale Johannesen
c215b3ef5d Handle quoted names when constructing $stub's, 
$non_lazy_ptr's and $lazy_ptr's.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51277 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-19 21:38:18 +00:00
Dale Johannesen
f88c81e332 Treat common as distinct from weak global on Darwin x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51172 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-16 00:52:06 +00:00
Evan Cheng
0ef8de30fa Fix typos and comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51165 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-15 22:13:02 +00:00
Evan Cheng
f0df03134e Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-15 08:39:06 +00:00
Dale Johannesen
aafce77b17 Add CommonLinkage; currently tentative definitions 
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both.  The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51118 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-14 20:12:51 +00:00
Evan Cheng
6bf877035e Doh. Alignment is in bytes, not in bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51092 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-14 02:49:43 +00:00
Dan Gohman
c9f5f3f64f Change target-specific classes to use more precise static types. 
This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-14 01:58:56 +00:00
Chris Lattner
3b34e1e9e8 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51062 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 19:56:20 +00:00
Evan Cheng
b656443366 - Fix the pasto in the fix for a previous pasto. 
- Incorporate Chris' comment suggestion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51061 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 18:59:59 +00:00
Chris Lattner
7171c836a9 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51060 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 18:48:54 +00:00
Nate Begeman
32097bdbf6 Fix one more encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51057 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 17:52:09 +00:00
Evan Cheng
11b6793ede - Don't treat anyext 16-bit load as a 32-bit load if it's volatile. 
- Correct a pasto.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51054 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 16:45:56 +00:00
Evan Cheng
77f0b7a50a Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset. 
pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 08:35:03 +00:00
Nate Begeman
c9bdb00683 Fix and encoding error in the psrad xmm, imm8 instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51020 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 01:47:52 +00:00
Evan Cheng
fa7fd33a26 On x86, it's safe to treat i32 load anyext as a normal i32 load. Ditto for i8 anyext load to i16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51019 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 00:54:02 +00:00
Dan Gohman
844731a7f1 Clean up the use of static and anonymous namespaces. This turned up 
several things that were neither in an anonymous namespace nor static
but not intended to be global.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-13 00:00:25 +00:00
Nate Begeman
0d1704b955 Teach Legalize how to scalarize VSETCC 
Teach X86 a few more vsetcc patterns.  Custom lowering for unsupported ones is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 23:09:43 +00:00
Evan Cheng
9bfa03c6fd Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 23:04:07 +00:00
Bill Wendling
9f8fea3531 Constify the machine instruction passed into the 
"is{Trivially,Really}ReMaterializable" methods.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51001 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 20:54:26 +00:00
Nate Begeman
c2616e43fd Initial X86 codegen support for VSETCC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51000 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 20:34:32 +00:00
Dan Gohman
9499b7186b Fix a copy+paste bug; pseudo-instructions shouldn't have 
encoding information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50997 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 20:22:45 +00:00
Evan Cheng
ad4196b44a Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 19:56:52 +00:00
Dan Gohman
2ce3898e41 Fix a compile error on compilers that still want a return value 
in a non-void function that calls abort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50969 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-12 16:17:19 +00:00
Anton Korobeynikov
64d69102a1 Add note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50959 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-11 14:33:15 +00:00
Evan Cheng
50d9e7289b When transforming a vector_shuffle to a load, the base address must not be an undef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50940 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-10 06:46:49 +00:00
Dan Gohman
9018e836fe For now, abort when an ISD::VAARG is encountered on x86-64, rather 
than silently generate invalid code.

llvm-gcc does not currently use VAArgInst; it lowers va_arg in the
front-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50930 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-10 01:26:14 +00:00
Evan Cheng
b70ea0bd03 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50929 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-10 00:59:18 +00:00
Evan Cheng
25210da757 If movl top bits are undef, let it be selected to movlps, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50928 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-10 00:58:41 +00:00
Evan Cheng
23573e5be6 Add a pattern to do move the low element of a v4f32 and zero extend the rest. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50922 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-09 23:37:55 +00:00
Evan Cheng
d880b97257 Handle a few more cases of folding load i64 into xmm and zero top bits. 
Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50918 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-09 21:53:03 +00:00
Evan Cheng
fd17f42bab Use movq to move low half of XMM register and zero-extend the rest. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50874 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-08 22:35:02 +00:00
Evan Cheng
7e2ff77ef0 Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50838 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-08 00:57:18 +00:00
Duncan Sands
671fa97a4b Output correct exception handling and frame info 
on x86-64 linux.  This causes no regressions on
32 bit linux and 32 bit ppc.  More tests pass
on 64 bit ppc with no regressions.  I didn't
turn on eh on 64 bit linux because the intrinsics
needed to compile the eh runtime aren't done
yet.  But if you turn it on and link with the
mainline runtime then eh seems to work fine
on x86-64 linux with this patch.  Thanks to
Dale for testing.  The main point of the patch
is that if you output that some object is
encoded using 4 bytes you had better not output
8 bytes for it: the patch makes everything
consistent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50825 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-07 19:11:09 +00:00