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3552 Commits

Author SHA1 Message Date
Dan Gohman
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel 
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 21:05:57 +00:00
Dan Gohman
67ca6be16a Tablegen generated code already tests the opcode value, so it's not 
necessary to use dyn_cast in these predicates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55055 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 15:24:22 +00:00
Dan Gohman
1e684cf1ef Fix comment spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55047 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 13:46:21 +00:00
Dale Johannesen
a99e38495f Add remaining 64-bit atomic patterns for x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:48:50 +00:00
Bill Wendling
5bf1b4eacd Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic. 
Just expand it like the other X-bit sub_and_fetches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55023 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:28:16 +00:00
Bill Wendling
108ecf3975 Add support for the __sync_sub_and_fetch atomics and friends for X86. The code 
was already present, but not hooked up to anything.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55018 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 23:09:18 +00:00
Dan Gohman
1adf1b03af Instantiate FastISel for X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55011 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 21:45:35 +00:00
Dan Gohman
d9f3c480a7 The X86 target will soon have an implementation of createFastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55010 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 21:32:53 +00:00
Dale Johannesen
140be2dfb7 Add support for 8 and 16 bit forms of __sync 
builtins on X86.

Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54999 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 18:47:28 +00:00
Chris Lattner
fa7e17d379 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54964 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 00:41:02 +00:00
Chris Lattner
cd7ab05c37 remove empty file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54950 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-18 21:27:19 +00:00
Evan Cheng
0ac3fc2a61 Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 19:22:34 +00:00
Cedric Venet
94fb5f2a70 Make it compile on VC2005: 
- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54898 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 18:24:26 +00:00
Anton Korobeynikov
3c3bc48d33 Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54886 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 13:53:59 +00:00
Anton Korobeynikov
d97f29531c Use correct name for TLS address resolution routine on x86-64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54845 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-16 12:58:29 +00:00
Anton Korobeynikov
d0c1e29aec Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54842 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-16 12:57:07 +00:00
Dan Gohman
172f0fa16b Build the X86GenFastISel.inc file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54806 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 23:18:11 +00:00
Dan Gohman
ef521f14b7 Also avoid pinsrw and pinsrb with a variable insertelement index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54803 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 22:53:18 +00:00
Owen Anderson
44eb65cf58 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 22:49:33 +00:00
Dan Gohman
c0573b13a1 Don't try to use the insertps instruction for vector 
element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54801 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 22:43:26 +00:00
Owen Anderson
eaa009d963 Remove more uses of std::set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54787 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 21:01:00 +00:00
Dan Gohman
ea9587bf41 Oops, check in these files too, for the FastISel -> Fast rename. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54750 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-13 19:55:00 +00:00
Dale Johannesen
6f83be0c61 When resolving a stub in x86-64 JIT, use a PC-relative branch 
rather than the absolute address if the target is within range.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54708 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-12 23:20:24 +00:00
Dale Johannesen
5f777192a0 Make x86-64 JIT changes Darwin-specific. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54700 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-12 21:02:08 +00:00
Dale Johannesen
ec867a22b3 In the absence of a linker to build the GOT, use the 32-bit 
non_lazy_ptr mechanism on x86-64 Darwin JIT.  Fixes a bunch
of last night's failures.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54692 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-12 18:23:48 +00:00
Dale Johannesen
50dd1d0280 Some fixes for x86-64 JIT. Make it use small code 
model, except for external calls; this makes
addressing modes PC-relative.  Incomplete.

The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54656 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-11 23:46:25 +00:00
Dan Gohman
d9ced09299 Add an EXTRACTPSmr pattern to match the pattern that 
X86ISelLowering creates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54544 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-08 18:30:21 +00:00
Anton Korobeynikov
16b7f5101b Generalize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54542 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-08 18:25:52 +00:00
Anton Korobeynikov
f5b6a47bb5 Handle visibility printing with all generality. Remove bunch of duplicate code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-08 18:25:07 +00:00
Evan Cheng
15621a2569 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54518 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-08 06:43:59 +00:00
Anton Korobeynikov
6a35daed6f Remove dead forward decl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54461 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-07 09:55:25 +00:00
Anton Korobeynikov
0f3cc65738 Switch ARM to new section handling stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54458 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-07 09:54:23 +00:00
Dan Gohman
e3d920699c Re-enable elimination of unnecessary SUBREG_TO_REG instructions in 
LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-07 02:54:50 +00:00
Dan Gohman
8a1510d192 Re-introduce the 8-bit subreg zext-inreg patterns for x86-32, 
this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54418 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-06 18:27:21 +00:00
Dan Gohman
165660e417 xchg does not modify FLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54411 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-06 15:52:50 +00:00
Evan Cheng
e9d5035838 Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54376 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 22:19:15 +00:00
Dan Gohman
d0859943ac Add an assert to catch invalid VECTOR_SHUFFLE mask indices. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54329 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-04 23:09:15 +00:00
Andrew Lenharth
08ca62bb6f Add atomic sub for other sizes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54314 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-03 20:17:34 +00:00
Dan Gohman
11ba3b1af6 Reapply r54147 with a constraint to only use the 8-bit 
subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.

Also, change several 16-bit instructions to use 
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54223 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-30 18:09:17 +00:00
Dan Gohman
7ba145b0b4 Revert 54147. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54148 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-29 01:02:18 +00:00
Dan Gohman
b1e8cad61e Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation, 
which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-28 22:18:25 +00:00
Dan Gohman
475871a144 Rename SDOperand to SDValue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-27 21:46:04 +00:00
Dan Gohman
8968450305 Tidy SDNode::use_iterator, and complete the transition to have it 
parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54127 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-27 20:43:25 +00:00
Nate Begeman
fb8ead0c20 Disable mov{L, LP, HP, HLP, *DUP} shuffles for mmx 
mmx needs its own fancy shuffle logic based on unpack; for now we get correct but awful code.

Also commit Mon Ping's VSETCC patch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54039 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 19:05:58 +00:00
Nate Begeman
beb572b698 Fit in 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 17:34:41 +00:00
Nate Begeman
5f6ae30de5 Remove dead PatLeaf; there are a number of issues around MMX movl that need to be fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54026 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 17:25:04 +00:00
Evan Cheng
5e6ebaf4d1 Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions. 
Based on patch by Nicolas Capens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53939 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-23 00:22:17 +00:00
Evan Cheng
ace3c17798 Factor out SSE 4 wide shuffle lowering code into its own function. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53933 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-22 21:13:36 +00:00
Evan Cheng
52672b813e Fix PR2574: implement v2f32 scalar_to_vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53927 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-22 18:39:19 +00:00
Anton Korobeynikov
f88a6faf93 Fix encoding of atomic compare and swap for i64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53911 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-22 16:22:48 +00:00