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f9930da2ef
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10893 Commits

Author SHA1 Message Date
Che-Liang Chiou
f9930da2ef Add ret instruction to PTX backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 07:46:17 +00:00
Rafael Espindola
73ffea47d2 Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put 
symbols defined in merge sections in independent atoms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114786 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 05:42:19 +00:00
Owen Anderson
b0ba0f4170 LoadPRE was not properly checking that the load it was PRE'ing post-dominated the block it was being hoisted to. 
Splitting critical edges at the merge point only addressed part of the issue; it is also possible for non-post-domination
to occur when the path from the load to the merge has branches in it.  Unfortunately, full anticipation analysis is
time-consuming, so for now approximate it.  This is strictly more conservative than real anticipation, so we will miss
some cases that real PRE would allow, but we also no longer insert loads into paths where they didn't exist before. :-)

This is a very slight net positive on SPEC for me (0.5% on average).  Most of the benchmarks are largely unaffected, but
when it pays off it pays off decently: 181.mcf improves by 4.5% on my machine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 05:26:18 +00:00
Rafael Espindola
a648918eb7 Reapply 114678 and 114667. Reverting them did not fix the bot: 
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost/builds/69

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 21:19:03 +00:00
Jakob Stoklund Olesen
ed37a64c46 Be more precise when trying to XFAIL this tester: http://google1.osuosl.org:8011/builders/llvm-arm-linux 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114755 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 20:34:49 +00:00
Evan Cheng
fff606d7b2 Enable code placement optimization pass for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 19:07:23 +00:00
Rafael Espindola
cd4b20a25b Revert 114678 and 114667 to see if 
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost

gets happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114742 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 18:48:08 +00:00
Daniel Dunbar
facb34b41c MC/AsmParser: Handle a missed case of floating literals in the lexer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114733 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 17:10:26 +00:00
Michael J. Spencer
ee6944f4ab CMake: Build unittests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114725 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 09:01:13 +00:00
Michael J. Spencer
c8417d7165 Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114724 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 09:00:56 +00:00
Daniel Dunbar
b95a079cae MC/AsmParser: Support .single and .double for embedding floating point literals. 
- I believe more modern 'gas' supports a more enhanced set of arithmetic on
   them, but for now the only thing we can do is emit them as data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 01:59:56 +00:00
Bob Wilson
2a6e616142 Set alignment operand for NEON VST instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:42:37 +00:00
Bob Wilson
40ff01a030 Set alignment operand for NEON VLD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 21:43:54 +00:00
Rafael Espindola
e15eb4e14c Correctly handle weak undefined symbols. Before we would get a invalid binding 
(2 == STB_WEAK | STB_GLOBAL).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 19:55:14 +00:00
Rafael Espindola
b142bef30b Represent relocations against local symbols as relocations against the section 
they are in. Both ways should be equivalent, but gas produces relocations
against the section.

Roman wrote the patch, I added the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 17:25:18 +00:00
Bob Wilson
edf017487f Fix llvm-extract so that it changes the linkage of all GlobalValues to 
"external" even when doing lazy bitcode loading.  This was broken because
a function that is not materialized fails the !isDeclaration() test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 17:25:06 +00:00
Evan Cheng
dd3a41a6b3 Disable codegen prepare critical edge splitting. Machine instruction passes now 
break critical edges on demand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114633 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 06:55:34 +00:00
Dan Gohman
be2d4e77b5 Fix llvm-extract -delete's lazy loading to materialize the functions that 
will not be deleted, rather than the ones that will.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114614 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 00:33:13 +00:00
Owen Anderson
ed1088afb5 A select between a constant and zero, when fed by a bit test, can be efficiently 
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:58:22 +00:00
Cameron Esfahani
4af1eaee70 Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:35:21 +00:00
Rafael Espindola
59ff3c9134 Avoid some Mach-O specific alignment being done on ELF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:27:05 +00:00
Rafael Espindola
1963572f9d Correctly align bss. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114556 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 17:43:04 +00:00
Mikhail Glushenkov
3724945025 llvmc: Support '-emit-llvm -S' with -opt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114541 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 09:00:41 +00:00
Chris Lattner
2c5291b563 fix rdar://8456371 - Handle commutable instructions written backward. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114536 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 06:26:39 +00:00
Chris Lattner
1eb1b68e3a Fix an inconsistency in the x86 backend that led it to reject "calll foo" on 
x86-32: 32-bit calls were named "call" not "calll".  64-bit calls were correctly
named "callq", so this only impacted x86-32.

This fixes rdar://8456370 - llvm-mc rejects 'calll'

This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 05:49:14 +00:00
Chris Lattner
bc57c6db4a fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8" 
Teaching the code generator about CR8-15, how to rex them up, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 05:29:50 +00:00
Chris Lattner
f7d4da0c1d fix rdar://8456417 - llvm-mc can't do basic math 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114532 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 05:05:16 +00:00
Chris Lattner
c2b942acf6 add the missing aliases for fp stack cmovs, rdar://8456391 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:56:20 +00:00
Chris Lattner
f93b90c5df reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:39:11 +00:00
Chris Lattner
33d60d5e56 Fix rdar://8456364 - llvm-mc rejects '%CS' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114528 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:11:10 +00:00
Chris Lattner
0c289c140e fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp' 
-This line, and those below, will be ignored--

M    test/MC/AsmParser/X86/x86_instructions.s
M    lib/Target/X86/AsmParser/X86AsmParser.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114527 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:04:03 +00:00
Chris Lattner
61129252e4 fix rdar://8456361 - llvm-mc rejects 'rep movsd' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 03:50:32 +00:00
Chris Lattner
40d66052f4 linux has a different stack alignment than the mac, relax this a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:46:26 +00:00
Chris Lattner
8864155a35 give VZEXT_LOAD a memory operand, it now works with segment registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:34:38 +00:00
Chris Lattner
0b79cfee15 revert r114386 now that address modes work correctly, we get a nice 
call through gs-relative memory now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:11:31 +00:00
Chris Lattner
93c4a5bef7 give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:59:42 +00:00
Chris Lattner
b72d53d8ef filecheckize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114507 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:57:27 +00:00
Evan Cheng
691e64a54c OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:49:07 +00:00
Owen Anderson
8614167572 Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 
irrelevant, but add a new test for the new, improved functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:51:46 +00:00
Devang Patel
161f0caaf9 Use FileCheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:50:32 +00:00
Owen Anderson
c004eec71b When adding the carry bit to another value on X86, exploit the fact that the carry-materialization 
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:41:19 +00:00
Mikhail Glushenkov
46aa524f0d llvmc: Allow multiple output languages. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114433 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 14:59:42 +00:00
Chris Lattner
08bad54baf fix rdar://8453210, a crash handling a call through a GS relative load. 
For now, just disable folding the load into the call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 03:37:00 +00:00
Rafael Espindola
f7c10a3cff Implement support for .local and its "interesting" interactions with .comm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114382 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 00:24:38 +00:00
Evan Cheng
44be1a8d66 Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 22:52:00 +00:00
Owen Anderson
765fd9c62d CombinerAA is now reordering these stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 20:56:29 +00:00
Owen Anderson
4a9f150926 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 20:39:59 +00:00
Jim Grosbach
1dc335a79f Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:32:20 +00:00
Rafael Espindola
43779dcfef Produce a R_X86_64_32 when the value is >=0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:20:47 +00:00
NAKAMURA Takumi
e6af80d11d test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen. 
r114297 raises 3 failures. They might fail also on mingw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114317 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 21:58:55 +00:00