Tom Stellard
fbd383c93c
Reapply: R600: Make sure to inline all internal functions
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Function calls aren't supported yet.
This was reverted due to build breakages, which should be fixed now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221173 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-03 19:49:05 +00:00
Duncan P. N. Exon Smith
5e84760dde
IR: MDNode => Value: Instruction::getAllMetadataOtherThanDebugLoc()
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Change `Instruction::getAllMetadataOtherThanDebugLoc()` from a vector of
`MDNode` to one of `Value`. Part of PR21433.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221167 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-03 18:13:57 +00:00
Matt Arsenault
b6c9c729dd
R600: Don't unnecessarily repeat the register class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221119 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-02 23:46:59 +00:00
Matt Arsenault
37b154c175
R600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221118 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-02 23:46:54 +00:00
Matt Arsenault
2220408e1a
Support REG_SEQUENCE in tablegen.
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The problem is mostly that variadic output instruction
aren't handled, so it is rejected for having an inconsistent
number of operands, and then the right number of operands
isn't emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221117 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-02 23:46:51 +00:00
Reid Kleckner
8d2e511d3b
Revert "R600: Add missing file to CMakeLists.txt"
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This reverts commit r220998.
It should've been reverted with the other change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 23:39:10 +00:00
Reid Kleckner
a5607fb841
Revert "R600: Make sure to inline all internal functions"
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This reverts commit r220996.
It introduced layering violations causing link errors in many
configurations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221020 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 23:35:26 +00:00
Reid Kleckner
e1a4787d5d
Work around bugs in MSVC "14" CTP 3's conversion logic
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It appears to ignore or find ambiguous MachineInstrBuilder's conversion
operators that allow conversion to MachineInstr* and
MachineBasicBlock::bundle_iterator.
As a workaround, add an explicit way to get the MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221017 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 23:19:46 +00:00
Tom Stellard
03fb370534
R600: Add IPO to the list of required libraries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221004 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 21:52:08 +00:00
Tom Stellard
7dd15e65fb
R600: Add missing file to CMakeLists.txt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 20:56:36 +00:00
Tom Stellard
b5c86504a0
R600: Don't promote allocas when one of the users is a ptrtoint instruction
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We need to figure out how to track ptrtoint values all the
way until result is converted back to a pointer in order
to correctly rewrite the pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 20:52:04 +00:00
Tom Stellard
5d6cee5e65
R600: Make sure to inline all internal functions
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Function calls aren't supported yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-31 20:52:02 +00:00
Matt Arsenault
015776f38c
Add minnum / maxnum codegen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220342 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 23:01:01 +00:00
Matt Arsenault
c68710c02d
R600/SI: Add missing parameter to div_fmas intrinsic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 22:20:55 +00:00
Matt Arsenault
3605d74d23
R600: Use default GlobalDirective
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The overridden one wasn't inserting a space,
so you would end up with .globalfoo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 21:08:36 +00:00
Rafael Espindola
4af7ead7bd
Drop support for an old version of ld64 (from darwin 9).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 18:31:09 +00:00
Matt Arsenault
8287a4b564
R600/SI: Add pattern for bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220304 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 16:25:08 +00:00
Rafael Espindola
45968c54e9
Fix a bit of confusion about .set and produce more readable assembly.
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Every target we support has support for assembly that looks like
a = b - c
.long a
What is special about MachO is that the above combination suppresses the
production of a relocation.
With this change we avoid producing the intermediary labels when they don't
add any value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220256 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 01:17:30 +00:00
Aaron Watry
4e00650f58
R600/SI: Add global atomicrmw xchg
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220110 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:33:03 +00:00
Aaron Watry
2107be5bc7
R600/SI: Add global atomicrmw xor
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220109 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:33:01 +00:00
Aaron Watry
e81b68b86c
R600/SI: Add global atomicrmw or
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220108 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:32:59 +00:00
Aaron Watry
1883b51d2e
R600/SI: Add global atomicrmw min/umin
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220107 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:32:57 +00:00
Aaron Watry
387e397ecd
R600/SI: Add global atomicrmw max/umax
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220106 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:32:56 +00:00
Aaron Watry
beac0c1403
R600/SI: Add global atomicrmw and
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220105 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:32:54 +00:00
Aaron Watry
892bb7df98
R600/SI: Add global atomicrmw sub
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v2: Add separate offset/no-offset tests
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220104 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 23:32:52 +00:00
Matt Arsenault
24463c7df7
R600/SI: Remove redundant setting of instruction bits
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These are all set on the instruction base classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220091 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 21:13:11 +00:00
Matt Arsenault
b6591042cd
Fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220068 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:02:31 +00:00
Matt Arsenault
0e974f694b
R600/SI: Also check for FPImm literal constants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220067 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:50 +00:00
Matt Arsenault
7d8f1710a3
R600/SI: Allow commuting with source modifiers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220066 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:48 +00:00
Matt Arsenault
b4fe2b433e
R600/SI: Simplify code with hasModifiersSet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220065 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:45 +00:00
Matt Arsenault
415789c57e
R600/SI: Fix general commuting breaking src mods
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The generic code trying to use findCommutedOpIndices won't
understand that it needs to swap the modifier operands also,
so it should fail if they are set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220064 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:43 +00:00
Matt Arsenault
bf5be3f989
R600/SI: Cleanup code with ChangeToFPImmediate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220063 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:41 +00:00
Matt Arsenault
84895bd2e6
R600/SI: Allow comuting fp immediates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220062 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:39 +00:00
Matt Arsenault
7eeaefa0c8
R600/SI: Use early return instead of checking condition twice
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Any commutable instruction will have at least src1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220061 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 18:00:37 +00:00
Matt Arsenault
aa796b99bb
R600/SI: Use complex pattern for MUBUF load patterns.
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This eliminates a use of the SI_ADDR64_RSRC pseudo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220057 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 17:43:00 +00:00
Matt Arsenault
46b53c9e4b
R600/SI: Remove SI_BUFFER_RSRC pseudo
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Just use REG_SEQUENCE directly, so there are fewer
instructions to need to deal with later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220056 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 17:42:56 +00:00
Matt Arsenault
a383742439
R600/SI: Simplify debug printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219999 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 00:36:20 +00:00
Matt Arsenault
61bf4bf2c3
R600/SI: Remove another VALU pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219988 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-16 23:33:37 +00:00
Matt Arsenault
ceb4f4907d
R600/SI: Remove unnecessary VALU patterns
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These haven't been necessary since allowing
selecting SALU instructions in non-entry blocks
was enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219956 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-16 20:31:50 +00:00
Matt Arsenault
0134a9bed3
R600: Fix nonsensical implementation of computeKnownBits for BFE
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This was resulting in invalid simplifications of sdiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-16 20:07:40 +00:00
Matt Arsenault
231a8d6cfb
R600: Remove dead function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219879 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-16 00:08:09 +00:00
Matt Arsenault
37e484b5ef
R600: Remove unnecessary part of computeKnownBitsForTargetNode
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Zero-width BFEs are combined away already, so there's no point in
handling them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219868 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 23:37:49 +00:00
Matt Arsenault
bb402de0c9
Move variable down to use
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 23:37:42 +00:00
Tom Stellard
d3fc10a525
R600/SI: Fix bug where immediates were being used in DS addr operands
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The SelectDS1Addr1Offset complex pattern always tries to store constant
lds pointers in the offset operand and store a zero value in the addr operand.
Since the addr operand does not accept immediates, the zero value
needs to first be copied to a register.
This newly created zero value will not go through normal instruction
selection, so we need to manually insert a V_MOV_B32_e32 in the complex
pattern.
This bug was hidden by the fact that if there was another zero value
in the DAG that had not been selected yet, then the CSE done by the DAG
would use the unselected node for the addr operand rather than the one
that was just created. This would lead to the zero value being selected
and the DAG automatically inserting a V_MOV_B32_e32 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219848 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 21:08:59 +00:00
Matt Arsenault
8b3a9205b7
R600/SI: Also try to use 0 base for misaligned 8-byte DS loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 18:06:43 +00:00
Matt Arsenault
7fdd553b66
R600: Fix miscompiles when BFE has multiple uses
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SimplifyDemandedBits would break the other uses of the operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219819 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 17:58:34 +00:00
Rafael Espindola
90ce9f70e2
Simplify handling of --noexecstack by using getNonexecutableStackSection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 16:12:52 +00:00
Rafael Espindola
b510f8d08c
Move getNonexecutableStackSection up to the base ELF class.
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The .note.GNU-stack section is not SystemZ/X86 specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219796 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 15:44:16 +00:00
Matt Arsenault
18ed4acf21
R600: Use existing variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219778 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 05:07:00 +00:00
Matt Arsenault
8a55ca3c41
R600: Remove outdated comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219777 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-15 05:06:57 +00:00