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llvm-6502/test
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Evan Cheng 0104d9de04 - Assign load / store with shifter op address modes the right itinerary classes. 
- For now, loads of [r, r] addressing mode is the same as the
  [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
  identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
  is "free".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:49:06 +00:00
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Analysis
Add some comments.
2010-10-20 22:04:02 +00:00
Archive
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Assembler
The pshufw instruction came about in MMX2 when SSE was introduced. Don't place
2010-10-04 20:24:01 +00:00
Bindings/Ocaml
Don't test a removed function.
2010-10-09 15:53:25 +00:00
Bitcode
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BugPoint
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CodeGen
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
DebugInfo
FileCheckize
2010-10-15 16:06:42 +00:00
ExecutionEngine
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Feature
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FrontendAda
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FrontendC
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FrontendC++
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FrontendFortran
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FrontendObjC
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FrontendObjC++
Temporarily revert r117079; it broke a tester. Radar 6635085.
2010-10-22 18:44:22 +00:00
Integer
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lib
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Linker
Fix PR8300 by remembering to keep the bitcast in all cases.
2010-10-19 02:02:57 +00:00
LLVMC
Remove -llvmc-temp-hack from tblgen.
2010-10-23 07:32:53 +00:00
MC
Add correct NEON encodings for vtbl and vtbx.
2010-10-28 00:18:46 +00:00
Other
Make BasicAliasAnalysis a normal AliasAnalysis implementation which
2010-10-18 18:04:47 +00:00
Scripts
Cut unneeded global variable.
2010-10-20 22:01:39 +00:00
TableGen
Generalize tblgen's dag parsing logic to handle arbitrary expressions
2010-10-06 04:55:48 +00:00
Transforms
Teach InstCombine not to use Add and Neg on FP. PR 8490.
2010-10-27 23:45:18 +00:00
Unit
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Verifier
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CMakeLists.txt
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lit.cfg
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lit.site.cfg.in
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Makefile
test/Makefile: Force lit -j1 on Cygwin.
2010-10-22 09:40:37 +00:00
Makefile.tests
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site.exp.in
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TestRunner.sh
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