Nate Begeman 02b88a4586 ISD::OR, and it's accompanying SelectBitfieldInsert ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889 91177308-0d34-0410-b5e6-96231b3b80d8

2005-08-19 00:38:14 +00:00

..

Alpha

Fix some bugs in the alpha backend, some of which I introduced yesterday,

2005-08-17 17:08:24 +00:00

CBackend

Culling out use of unions for converting FP to bits and vice versa.

2005-08-17 19:34:49 +00:00

IA64

update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes

2005-08-16 21:56:37 +00:00

PowerPC

ISD::OR, and it's accompanying SelectBitfieldInsert

2005-08-19 00:38:14 +00:00

Skeleton

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Sparc

Promote dependency for MathExtras.h out of Constants.h.

2005-08-17 20:04:34 +00:00

SparcV8

Promote dependency for MathExtras.h out of Constants.h.

2005-08-17 20:04:34 +00:00

SparcV9

Update to use the new MathExtras.h support for log2 computation.

2005-08-02 19:26:06 +00:00

X86

The variable SAR's only take one operand too

2005-08-19 00:31:37 +00:00

Makefile

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MRegisterInfo.cpp

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Target.td

Add a new flag

2005-08-18 23:17:07 +00:00

TargetData.cpp

Update to use the new MathExtras.h support for log2 computation.

2005-08-02 19:26:06 +00:00

TargetFrameInfo.cpp

Eliminate all remaining tabs and trailing spaces.

2005-07-27 06:12:32 +00:00

TargetInstrInfo.cpp

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TargetMachine.cpp

Remove the X86 and PowerPC Simple instruction selectors; their time has

2005-08-18 23:53:15 +00:00

TargetMachineRegistry.cpp

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TargetSchedInfo.cpp

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TargetSubtarget.cpp

Eliminate all remaining tabs and trailing spaces.

2005-07-27 06:12:32 +00:00