Nate Begeman 0750a40a4f Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22995 91177308-0d34-0410-b5e6-96231b3b80d8		2005-08-24 00:21:28 +00:00
..
LegalizeDAG.cpp	Teach Legalize how to turn setcc into select_cc	2005-08-23 04:29:48 +00:00
Makefile
ScheduleDAG.cpp	Add a fast-path for register values. Add support for constant pool entries,	2005-08-22 01:04:32 +00:00
SelectionDAG.cpp	Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size	2005-08-24 00:21:28 +00:00
SelectionDAGISel.cpp	Fix a problem where constant expr shifts would not have their shift amount	2005-08-22 17:28:31 +00:00
SelectionDAGPrinter.cpp	Print physreg register nodes with target names (e.g. F1) instead of numbers	2005-08-19 21:21:16 +00:00
TargetLowering.cpp