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429022bf83
Flesh out the SetCC support... which currently ends in a little bit of unfinished code (which is probably completely hilarious) for generating the condition value splitting the basic block up into 4 blocks, like this (clearly a better API is needed for this!): BB cond. branch / / R1=1 R2=0 \ / \ / R=phi(R1,R2) Other minor edits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13423 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
DelaySlotFiller.cpp | ||
InstSelectSimple.cpp | ||
Makefile | ||
README.txt | ||
Sparc.h | ||
Sparc.td | ||
SparcAsmPrinter.cpp | ||
SparcInstrInfo.cpp | ||
SparcInstrInfo.h | ||
SparcInstrInfo.td | ||
SparcRegisterInfo.cpp | ||
SparcRegisterInfo.h | ||
SparcRegisterInfo.td | ||
SparcTargetMachine.cpp | ||
SparcTargetMachine.h | ||
SparcV8CodeEmitter.cpp | ||
SparcV8InstrInfo_F2.td | ||
SparcV8InstrInfo_F3.td | ||
SparcV8ISelSimple.cpp | ||
SparcV8JITInfo.h |
SparcV8 backend skeleton ------------------------ This directory will house a 32-bit SPARC V8 backend employing a expander-based instruction selector. Watch this space for more news coming soon! $Date$