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llvm-6502/lib/Target/R600
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David Woodhouse eab5cc34c6 Delete MCSubtargetInfo data members from target MCCodeEmitter classes 
The subtarget info is explicitly passed to the EncodeInstruction
method and we should use that subtarget info to influence any
encoding decisions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:13:25 +00:00
..
InstPrinter R600/SI: Add intrinsic for S_SENDMSG instruction 2014-01-27 07:20:44 +00:00
MCTargetDesc Delete MCSubtargetInfo data members from target MCCodeEmitter classes 2014-01-28 23:13:25 +00:00
TargetInfo Prune redundant dependencies in LLVMBuild.txt. 2013-12-11 00:30:57 +00:00
AMDGPU.h Fix known typos 2014-01-24 17:20:08 +00:00
AMDGPU.td R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
AMDGPUAsmPrinter.cpp Add back spaces I missed in the conversion to emitRawComments. 2014-01-27 00:19:41 +00:00
AMDGPUAsmPrinter.h Add a default constructor to get deterministic behavior. 2013-12-05 16:21:17 +00:00
AMDGPUCallingConv.td R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp R600: Take alignment into account when calculating the stack offset 2014-01-22 19:24:23 +00:00
AMDGPUFrameLowering.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
AMDGPUInstrInfo.h R600/SI: Implement spilling of SGPRs v5 2013-11-27 21:23:35 +00:00
AMDGPUInstrInfo.td R600: Add support for ISD::FROUND 2013-11-27 21:23:20 +00:00
AMDGPUInstructions.td R600: Disable the BFE pattern 2014-01-23 18:49:33 +00:00
AMDGPUIntrinsics.td R600: Add support for GROUP_BARRIER instruction 2013-06-28 15:46:59 +00:00
AMDGPUISelDAGToDAG.cpp R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
AMDGPUISelLowering.cpp R600: Add support for global addresses with constant initializers 2014-01-22 19:24:21 +00:00
AMDGPUISelLowering.h R600: Add support for global addresses with constant initializers 2014-01-22 19:24:21 +00:00
AMDGPUMachineFunction.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
AMDGPUMachineFunction.h [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
AMDGPUMCInstLower.cpp Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction() 2014-01-28 23:13:07 +00:00
AMDGPUMCInstLower.h R600: BB operand support for SI 2012-12-17 15:14:54 +00:00
AMDGPURegisterInfo.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
AMDGPURegisterInfo.h R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
AMDGPURegisterInfo.td Make SubRegIndex size mandatory, following r183020. 2013-05-31 23:45:26 +00:00
AMDGPUSubtarget.cpp R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
AMDGPUSubtarget.h R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
AMDGPUTargetMachine.cpp [cleanup] Move the Dominators.h and Verifier.h headers into the IR 2014-01-13 09:26:24 +00:00
AMDGPUTargetMachine.h SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions 2013-07-27 00:01:07 +00:00
AMDGPUTargetTransformInfo.cpp Add final and owerride keywords to TargetTransformInfo's subclasses. 2014-01-24 18:22:59 +00:00
AMDILBase.td R600: Move Subtarget feature definitions into AMDGPU.td 2013-06-07 20:28:49 +00:00
AMDILCFGStructurizer.cpp Fix known typos 2014-01-24 17:20:08 +00:00
AMDILInstrInfo.td R600: Enable -verify-machineinstrs in some tests. 2013-10-01 19:32:38 +00:00
AMDILIntrinsicInfo.cpp R600: Rework subtarget info and remove AMDILDevice classes 2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.h Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
AMDILIntrinsics.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILISelLowering.cpp Make some arrays 'static const' 2013-07-15 06:39:13 +00:00
AMDILRegisterInfo.td
CMakeLists.txt [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too. 2013-11-28 17:04:31 +00:00
LLVMBuild.txt Add proper dependencies to LLVMBuild.txt in llvm/lib. 2013-12-10 05:39:34 +00:00
Makefile
Processors.td R600: Recommit 199842: Add work-around for the CF stack entry HW bug 2014-01-23 16:18:02 +00:00
R600ClauseMergePass.cpp Fix known typos 2014-01-24 17:20:08 +00:00
R600ControlFlowFinalizer.cpp R600: Correctly handle vertex fetch clauses the precede ENDIFs 2014-01-23 18:49:31 +00:00
R600Defines.h Fix known typos 2014-01-24 17:20:08 +00:00
R600EmitClauseMarkers.cpp R600: Register R600EmitClauseMarkers pass 2013-12-11 17:51:41 +00:00
R600ExpandSpecialInstrs.cpp R600: Fix input modifiers lost for Cayman 2013-12-10 14:43:27 +00:00
R600InstrFormats.td R600: Use SchedModel enum for is{Trans,Vector}Only functions 2013-09-04 19:53:30 +00:00
R600InstrInfo.cpp R600: Remove successive JUMP in AnalyzeBranch when AllowModify is true 2014-01-23 18:49:34 +00:00
R600InstrInfo.h Fix known typos 2014-01-24 17:20:08 +00:00
R600Instructions.td Fix known typos 2014-01-24 17:20:08 +00:00
R600Intrinsics.td R600: Reenable llvm.R600.load.input/interp.input for compatibility 2013-11-12 16:26:47 +00:00
R600ISelLowering.cpp Fix known typos 2014-01-24 17:20:08 +00:00
R600ISelLowering.h Fix known typos 2014-01-24 17:20:08 +00:00
R600MachineFunctionInfo.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
R600MachineFunctionInfo.h [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
R600MachineScheduler.cpp Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
R600MachineScheduler.h Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
R600OptimizeVectorRegisters.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00
R600Packetizer.cpp Fix known typos 2014-01-24 17:20:08 +00:00
R600RegisterInfo.cpp R600: Fix scheduling of instructions that use the LDS output queue 2013-11-15 00:12:45 +00:00
R600RegisterInfo.h R600: Fix scheduling of instructions that use the LDS output queue 2013-11-15 00:12:45 +00:00
R600RegisterInfo.td R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600Schedule.td R600: Add local memory support via LDS 2013-06-28 15:47:08 +00:00
R600TextureIntrinsicsReplacer.cpp R600: Coding style 2013-09-05 23:55:13 +00:00
SIAnnotateControlFlow.cpp [PM] Split DominatorTree into a concrete analysis result object which 2014-01-13 13:07:17 +00:00
SIDefines.h R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
SIFixSGPRCopies.cpp R600/SI: Fix illegal VGPR->SGPR copy inside of loop 2013-11-18 18:50:20 +00:00
SIInsertWaits.cpp R600/SI: Add intrinsic for S_SENDMSG instruction 2014-01-27 07:20:44 +00:00
SIInstrFormats.td R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
SIInstrInfo.cpp Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies. 2013-12-17 04:50:45 +00:00
SIInstrInfo.h Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
SIInstrInfo.td R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions 2014-01-27 07:20:51 +00:00
SIInstructions.td R600/SI: Add pattern for truncating i32 to i1 2014-01-28 03:01:16 +00:00
SIIntrinsics.td R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions 2014-01-27 07:20:51 +00:00
SIISelLowering.cpp Fix known typos 2014-01-24 17:20:08 +00:00
SIISelLowering.h R600/SI: Implement add i64, but do not yet enable. 2013-11-18 20:09:47 +00:00
SILowerControlFlow.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
SIMachineFunctionInfo.cpp R600/SI: Implement spilling of SGPRs v5 2013-11-27 21:23:35 +00:00
SIMachineFunctionInfo.h R600/SI: Implement spilling of SGPRs v5 2013-11-27 21:23:35 +00:00
SIRegisterInfo.cpp Fix known typos 2014-01-24 17:20:08 +00:00
SIRegisterInfo.h R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
SIRegisterInfo.td R600: Fix handling of vector kernel arguments 2013-10-23 00:44:32 +00:00
SISchedule.td
SITypeRewriter.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00