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0ee5398b7f
Summary: MIPS32r6/MIPS64r6 support has not been added yet. inlineasm-cnstrnt-reg.ll: Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6 when -integrated-as is the default. We can't change the mnemonic since the LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no instructions that use LO. 2008-08-01-AsmInline.ll: Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit different code and this is a regression test. mips64instrs.ll and mips64muldiv.ll Check registers and the way the multiply is used in m1 divrem.ll Check registers and use multiple filecheck prefixes to limit redundancy Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida Reviewed By: matheusalmeida Subscribers: matheusalmeida Differential Revision: http://reviews.llvm.org/D3894 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210656 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Analysis | ||
Assembler | ||
Bindings | ||
Bitcode | ||
BugPoint | ||
CodeGen | ||
DebugInfo | ||
ExecutionEngine | ||
Feature | ||
FileCheck | ||
Instrumentation | ||
Integer | ||
JitListener | ||
Linker | ||
LTO | ||
MC | ||
Object | ||
Other | ||
TableGen | ||
tools | ||
Transforms | ||
Unit | ||
Verifier | ||
YAMLParser | ||
.clang-format | ||
CMakeLists.txt | ||
lit.cfg | ||
lit.site.cfg.in | ||
Makefile | ||
Makefile.tests | ||
TestRunner.sh |