Daniel Sanders 0ee5398b7f [mips][mips64r6] Improve tests affected by the changes to multiplies and divides ... Summary: MIPS32r6/MIPS64r6 support has not been added yet. inlineasm-cnstrnt-reg.ll: Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6 when -integrated-as is the default. We can't change the mnemonic since the LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no instructions that use LO. 2008-08-01-AsmInline.ll: Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit different code and this is a regression test. mips64instrs.ll and mips64muldiv.ll Check registers and the way the multiply is used in m1 divrem.ll Check registers and use multiple filecheck prefixes to limit redundancy Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida Reviewed By: matheusalmeida Subscribers: matheusalmeida Differential Revision: http://reviews.llvm.org/D3894 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210656 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-11 15:48:00 +00:00
..
AArch64	Global merge for global symbols.	2014-06-11 06:44:53 +00:00
ARM	Global merge for global symbols.	2014-06-11 06:44:53 +00:00
CPP	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
Generic	Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.	2014-06-05 19:29:43 +00:00
Hexagon	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
Inputs
Mips	[mips][mips64r6] Improve tests affected by the changes to multiplies and divides	2014-06-11 15:48:00 +00:00
MSP430	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
NVPTX	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
PowerPC	[PPC64LE] Recognize shufflevector patterns for little endian	2014-06-10 14:35:01 +00:00
R600	R600: Use BCNT_INT for evergreen	2014-06-10 19:18:28 +00:00
SPARC	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
SystemZ	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
Thumb	Fix a bug in the Thumb1 ARM Load/Store optimizer	2014-06-10 16:39:21 +00:00
Thumb2	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
X86	Add AVX512 masked leadz instrinsic support.	2014-06-11 12:54:45 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00