Hal Finkel 0fcdd8b2cc Add support for generating reg+reg (indexed) pre-inc loads on PPC. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158823 91177308-0d34-0410-b5e6-96231b3b80d8		2012-06-20 15:43:03 +00:00
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ARM	Add DAG-combines for aggressive FMA formation.	2012-06-19 22:51:23 +00:00
CellSPU
CPP
Generic	Fix test case to work on ARM.	2012-06-11 16:01:14 +00:00
Hexagon	Enable all Hexagon tests.	2012-05-15 16:13:12 +00:00
MBlaze
Mips	1. introduce MipsPat in place of Pat in order to exclude those from	2012-06-14 21:03:23 +00:00
MSP430	These tests used intrinsics with the wrong prototype. They weren't caught because	2012-05-27 19:35:41 +00:00
NVPTX	Add llvm.fabs intrinsic.	2012-05-28 21:48:37 +00:00
PowerPC	Add support for generating reg+reg (indexed) pre-inc loads on PPC.	2012-06-20 15:43:03 +00:00
SPARC
Thumb
Thumb2	Add a test case for global live range splitting.	2012-05-23 23:42:23 +00:00
X86	Don't insert 128-bit UNDEF into 256-bit vectors. Just keep the 256-bit vector. Original patch by Elena Demikhovsky. Tweaked by me to allow possibility of covering more cases.	2012-06-20 05:39:26 +00:00
XCore	Fix pattern for MKMSK instruction.	2012-06-13 17:59:12 +00:00