David Majnemer b99ee32499 [llvm-objdump] Print the call target next to the instruction ... GNU binutils provides this behavior. objdump -r doesn't really help when you aren't dealing with relocation object files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241631 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-07 22:06:59 +00:00
..
AlignedBundling	[llvm-objdump] Print the call target next to the instruction	2015-07-07 22:06:59 +00:00
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s	AVX-512: Implemented missing encoding for FMA scalar instructions	2015-07-01 13:24:28 +00:00
avx512-err.s
avx512bw-encoding.s
avx512vl-encoding.s	AVX-512: all forms of SCATTER instruction on SKX,	2015-06-29 12:14:24 +00:00
cfi_def_cfa-crash.s
compact-unwind.s
expand-var.s
faultmap-section-parsing.s	[FaultMaps] Add a parser for the __llvm__faultmaps section.	2015-06-22 18:03:02 +00:00
fde-reloc.s
fixup-cpu-mode.s
gnux32-dwarf-gen.s
hex-immediates.s	[objdump] Moving PrintImmHex out of MachODump and in to llvm-objdump and setting instprinter appropriately.	2015-06-07 21:07:17 +00:00
i386-darwin-frame-register.ll
index-operations.s
inline-asm-obj.ll	Add a test for a recent regression.	2015-06-25 16:16:08 +00:00
intel-syntax-2.s
intel-syntax-ambiguous.s
intel-syntax-avx512.s	AVX-512: Implemented VFIXUPIMMSD and VFIXUPIMMSS instructions for KNL	2015-06-02 08:28:57 +00:00
intel-syntax-bitwise-ops.s	Add support for parsing the XOR operator in Intel syntax inline assembly.	2015-06-14 12:59:45 +00:00
intel-syntax-directional-label.s
intel-syntax-encoding.s
intel-syntax-error.s
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-ptr-sized.s
intel-syntax-unsized-memory.s
intel-syntax-x86-64-avx512f_vl.s
intel-syntax.s
invalid-sleb.s
lit.local.cfg
macho-uleb.s
mpx-encodings.s	X86-MPX: Implemented encoding for MPX instructions.	2015-06-09 13:02:10 +00:00
no-elf-compact-unwind.s
padlock.s
relax-insn.s
reloc-macho.s
reloc-undef-global.s
ret.s
sgx-encoding.s
shuffle-comments.s
stackmap-nops.ll
validate-inst-att.s
validate-inst-intel.s
variant-diagnostics.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	[X86] Add proper 64-bit mode checks to jrcxz and jcxz.	2015-07-04 00:01:07 +00:00
x86_long_nop.s
x86_nop.s
x86_operands.s
x86-16.s
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s
x86-64-avx512bw_vl.s	[X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale	2015-07-06 14:03:40 +00:00
x86-64-avx512bw.s	[X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale	2015-07-06 14:03:40 +00:00
x86-64-avx512dq_vl.s	AVX-512: Implemented VRANGEPD and VRANGEPD instructions for SKX.	2015-06-01 11:05:34 +00:00
x86-64-avx512dq.s	AVX-512: Implemented VRANGESD and VRANGESS instructions for SKX Implemented DAG lowering for all these forms.	2015-06-02 14:12:54 +00:00
x86-64-avx512f_vl.s	AVX-512: Implemented missing encoding and intrinsics for FMA instructions	2015-06-29 09:10:00 +00:00
x86-64.s
x86-itanium.ll
x86-target-directives.s
x86-windows-itanium-libcalls.ll