llvm-6502/test/CodeGen
Jakob Stoklund Olesen 4ad27eda29 Infer instruction properties from single-instruction patterns.
Previously, instructions without a primary patterns wouldn't get their
properties inferred. Now, we use all single-instruction patterns for
inference, including 'def : Pat<>' instances.

This causes a lot of instruction flags to change.

- Many instructions no longer have the UnmodeledSideEffects flag because
  their flags are now inferred from a pattern.

- Instructions with intrinsics will get a mayStore flag if they already
  have UnmodeledSideEffects and a mayLoad flag if they already have
  mayStore. This is because intrinsics properties are linear.

- Instructions with atomic_load patterns get a mayStore flag because
  atomic loads can't be reordered. The correct workaround is to create
  pseudo-instructions instead of using normal loads. PR13693.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162614 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24 22:46:53 +00:00
..
ARM Rejected 169195. As Duncan commented, bitcasting to proper type is wrong approach. We need to insert some valid TRANCATE node here. 2012-08-22 09:33:55 +00:00
CellSPU
CPP
Generic BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle 2012-08-24 18:14:27 +00:00
Hexagon Infer instruction properties from single-instruction patterns. 2012-08-24 22:46:53 +00:00
MBlaze
Mips Disable Mips' delay slot filler when optimization level is O0. 2012-08-24 20:40:15 +00:00
MSP430
NVPTX
PowerPC Lower constant pools and jump tables via TOC on PPC64/SVR4. 2012-08-24 16:26:02 +00:00
SPARC
Thumb
Thumb2
X86 fix a case where all operands of BUILD_VECTOR are undefined 2012-08-20 17:59:18 +00:00
XCore