Jakob Stoklund Olesen 160a3bf74d Add StringRef::compare_numeric and use it to sort TableGen register records. ... This means that our Registers are now ordered R7, R8, R9, R10, R12, ... Not R1, R10, R11, R12, R2, R3, ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104745 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-26 21:47:28 +00:00
..
ADT	Add StringRef::compare_numeric and use it to sort TableGen register records.	2010-05-26 21:47:28 +00:00
Analysis
Assembly
Bitcode
CodeGen	Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in	2010-05-26 20:22:18 +00:00
CompilerDriver
Config
ExecutionEngine
MC	MC: Eliminate MCAsmFixup, replace with MCFixup.	2010-05-26 15:18:56 +00:00
Support
System
Target	MC: Change RelaxInstruction to only take the input and output instructions.	2010-05-26 18:15:06 +00:00
Transforms
AbstractTypeUser.h
Argument.h
Attributes.h
AutoUpgrade.h
BasicBlock.h
CallGraphSCCPass.h
CallingConv.h
CMakeLists.txt
Constant.h
Constants.h
DerivedTypes.h
Function.h
GlobalAlias.h
GlobalValue.h
GlobalVariable.h
GVMaterializer.h
InlineAsm.h
InstrTypes.h
Instruction.def
Instruction.h
Instructions.h
IntrinsicInst.h
Intrinsics.h
Intrinsics.td	Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in	2010-05-26 20:22:18 +00:00
IntrinsicsAlpha.td
IntrinsicsARM.td
IntrinsicsCellSPU.td
IntrinsicsPowerPC.td
IntrinsicsX86.td	Make sure aeskeygenassist uses an unsigned immediate field.	2010-05-25 17:33:22 +00:00
IntrinsicsXCore.td
LinkAllPasses.h
LinkAllVMCore.h
Linker.h
LLVMContext.h
Metadata.h
Module.h
OperandTraits.h
Operator.h
Pass.h
PassAnalysisSupport.h
PassManager.h
PassManagers.h
PassSupport.h
SymbolTableListTraits.h
Type.h
TypeSymbolTable.h
Use.h
User.h
Value.h
ValueSymbolTable.h