llvm-6502/include/llvm/Target
2010-05-26 18:15:06 +00:00
..
Mangler.h give Mangler access to TargetData. 2010-03-12 20:47:28 +00:00
SubtargetFeature.h The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a 2010-05-11 00:30:02 +00:00
Target.td Replace the SubRegSet tablegen class with a less error-prone mechanism. 2010-05-26 17:27:12 +00:00
TargetAsmBackend.h MC: Change RelaxInstruction to only take the input and output instructions. 2010-05-26 18:15:06 +00:00
TargetAsmLexer.h Moved InstallLexer() from the X86-specific AsmLexer 2010-01-31 02:28:18 +00:00
TargetAsmParser.h Fix various doxygen warnings. 2010-02-22 04:10:52 +00:00
TargetCallingConv.td
TargetData.h Revert r97064. Duncan pointed out that bitcasts are defined in 2010-02-25 15:20:39 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h add a convenient TargetInstrDesc::getNumImplicitUses/Defs method. 2010-03-24 23:07:47 +00:00
TargetInstrInfo.h Implement @llvm.returnaddress. rdar://8015977. 2010-05-22 01:47:14 +00:00
TargetInstrItineraries.h Initial support for different kinds of FU reservation. 2010-04-07 18:19:32 +00:00
TargetIntrinsicInfo.h Reintroduce support for overloading target intrinsics 2009-11-05 03:19:08 +00:00
TargetJITInfo.h * Move stub allocation inside the JITEmitter, instead of exposing a 2009-11-23 23:35:19 +00:00
TargetLowering.h Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. 2010-05-20 23:26:43 +00:00
TargetLoweringObjectFile.h Add a new section and accessor for TLS data. 2010-05-22 00:00:58 +00:00
TargetMachine.h Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. 2010-05-20 23:26:43 +00:00
TargetOpcodes.h Add a pseudo instruction REG_SEQUENCE that takes a list of registers and 2010-05-01 00:28:44 +00:00
TargetOptions.h Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
TargetRegisterInfo.h Drop the SuperregHashTable. It is essentially the same as SubregHashTable. 2010-05-25 23:43:18 +00:00
TargetRegistry.h Currently, createMachOStreamer() is invoked directly in llvm-mc which 2010-05-21 12:54:43 +00:00
TargetSchedule.td Make processor FUs unique for given itinerary. This extends the limit of 32 2010-04-18 20:31:01 +00:00
TargetSelect.h Add the rest of the build system logic for optional target disassemblers 2009-11-25 04:46:58 +00:00
TargetSelectionDAG.td finally remove the immAllOnesV_bc/immAllZerosV_bc patterns 2010-03-28 08:43:23 +00:00
TargetSelectionDAGInfo.h Fix a comment. 2010-05-11 18:03:41 +00:00
TargetSubtarget.h Allow target to specify regclass for which antideps will only be broken along the critical path. 2009-11-13 19:52:48 +00:00