Jakob Stoklund Olesen 17f42e02a1 Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers." ... Keep the integer_insertelement test case, the new coalescer can handle this kind of lane insertion without help from pseudo-instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166835 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-26 23:39:46 +00:00
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ARM	Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."	2012-10-26 23:39:46 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP
Generic
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze
Mips	implement mips16 tls global addr	2012-10-26 22:57:32 +00:00
MSP430	Fix fallout from RegInfo => FrameLowering refactoring on MSP430.	2012-10-17 17:37:11 +00:00
NVPTX
PowerPC	This patch addresses a PPC64 ELF issue with passing parameters consisting of	2012-10-25 13:38:09 +00:00
SPARC	Fix broken tests.	2012-10-02 15:49:34 +00:00
Thumb
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	Add test for ATOM ISA SSSE3	2012-10-25 17:50:05 +00:00
XCore