Adam Nemet 1b5d421e4d Test commit ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202528 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-28 18:44:39 +00:00
..
AArch64	AArch64: simplify tbl/tbx polymorphism	2014-02-26 11:55:09 +00:00
ARM	Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now	2014-02-27 17:56:08 +00:00
CPP
Generic
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	Fixed operand of SC microMIPS instruction.	2014-02-28 18:22:56 +00:00
MSP430
NVPTX
PowerPC	Swap PPC isel operands to allow for 0-folding	2014-02-28 06:11:16 +00:00
R600	R600/SI: Optimize SI_KILL for constant operands	2014-02-27 01:47:09 +00:00
SPARC	Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding	2014-02-27 19:26:29 +00:00
SystemZ
Thumb	Add triples to try to fix the windows bots.	2014-02-13 16:49:47 +00:00
Thumb2	ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block	2014-02-26 11:27:28 +00:00
X86	Test commit	2014-02-28 18:44:39 +00:00
XCore	[XCore] Support functions returning more than 4 words.	2014-02-27 17:47:54 +00:00